Figure 1. ADS-947 Functional Block Diagram

FEATURES

14-bit resolution

10MHz minimum sampling rate

No missing codes

Ideal for both time and frequency-domain applications

Excellent THD (81dB) and SNR (76dB)

Edge-triggered

Small, 24-pin, ceramic DDIP or SMT

Requires only +5V and 5.2V supplies

Low-power, 2 Watts

GENERAL DESCRIPTION

The ADS-947 is a 14-bit, 10MHz sampling A/D converter.
This device accurately samples full-scale input signals up to

Nyquist frequencies with no missing codes. Excellent

differential nonlinearity error (DNL), signal-to-noise ratio
(SNR), and total harmonic distortion (THD) make the ADS-

947 the ideal choice for both time-domain (CCD/FPA

imaging, scanners, process control) and frequency-domain
(radar, telecommunications, spectrum analysis) applications.

The functionally complete ADS-947 contains a fast-settling

sample/hold amplifier, a subranging (two-pass) A/D converter,

an internal reference, timing/control logic, and error-correction
circuitry. Digital input and output levels are TTL. The ADS-947

only requires the rising edge of a start convert pulse to

operate.

Requiring only +5V and 5.2V supplies, the ADS-947 typically

dissipates just 2 Watts. The device is offered with a bipolar

input range of ±2V. Models are available for use in either
commercial (0 to +70°C) or extended (40 to +100°C)

operating temperature ranges. A proprietary, auto-calibrating,
error-correcting circuit allows the device to achieve specified

performance over the extended temperature range.

INPUT/OUTPUT CONNECTIONS

PRELIMINARY PRODUCT DATA

REF

DAC

REGI

STER

REGI

STER

OUTPUT REGI

STER

16 BIT 14 (LSB)

15 BIT 13

12 BIT 12

11 BIT 11

10 BIT 10

9 BIT 9

8 BIT 8

7 BIT 7

6 BIT 6

5 BIT 5

4 BIT 4

3 BIT 3

2 BIT 2

1 BIT 1 (MSB)

TIMING AND

CONTROL LOGIC

OFFSET ADJUST 23

ANALOG INPUT 21

START CONVERT 18

DATA VALID 17

+5V ANALOG SUPPLY 22

+5V DIGITAL SUPPLY 13

5.2V SUPPLY

ANALOG GROUND

19, 24

DIGITAL GROUND

S/H

BUFFER

TAL CORRECTI

N LOGI

FLASH

ADC

FLASH

ADC

POWER AND GROUNDING

AMP

PIN

FUNCTION

PIN

FUNCTION

BIT 1 (MSB)

ANALOG GROUND

BIT 2

OFFSET ADJUST

BIT 3

+5V ANALOG SUPPLY

BIT 4

ANALOG INPUT

BIT 5

5.2V SUPPLY

BIT 6

ANALOG GROUND

BIT 7

START CONVERT

BIT 8

DATA VALID

BIT 9

BIT 14 (LSB)

BIT 10

BIT 13

BIT 11

DIGITAL GROUND

BIT 12

+5V DIGITAL SUPPLY

ADS-947

14-Bit, 10MHz

Sampling A/D Converters

DATEL, Inc., Mansfield, MA 02048 (USA)

Tel: (508) 339-3000, (800) 233-2765 Fax: (508) 339-6356

Email: sales@datel.com

Internet:

www.datel.com

ADS-947

+25°C

0 to +70°C

40 to +100°C

ANALOG INPUT

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

UNITS

Input Voltage Range

±2

Volts

Input Resistance

250

Input Capacitance

DIGITAL INPUT

Logic Levels

Logic "1"

+2.0

Volts

Logic "0"

+0.8

Volts

Logic Loading "1"

+20

µA

Logic Loading "0"

µA

Start Convert Positive Pulse Width

STATIC PERFORMANCE

Resolution

Bits

Integral Nonlinearity (f

= 10kHz)

±0.75

±1

LSB

Differential Nonlinearity (f

= 10kHz)

0.95

±0.5

+1.25

0.95

±0.5

+1.25

0.95

±0.5

+1.5

LSB

Full Scale Absolute Accuracy

±0.15

±0.4

±0.15

±0.4

±0.8

%FSR

Bipolar Zero Error (Tech Note 2)

±0.1

±0.3

±0.1

±0.3

±0.6

%FSR

Gain Error (Tech Note 2)

±0.2

±0.4

±0.2

±0.4

±1.5

No Missing Codes (f

= 10kHz)

Bits

DYNAMIC PERFORMANCE

Peak Harmonics (0.5dB)

dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Total Harmonic Distortion (0.5dB)

dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Signal-to-Noise Ratio

(w/o distortion, 0.5dB)
dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Signal-to-Noise Ratio

(& distortion, 0.5dB)
dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Noise

150

µVrms

Two-tone Intermodulation

Distortion (f

= 2.45MHz,

1.975MHz, f

= 10MHz, 0.5dB)

Input Bandwidth (3dB)

Small Signal (20dB input)

MHz

Large Signal (0.5dB input)

MHz

Feedthrough Rejection (f

= 5MHz)

Slew Rate

±400

V/µs

Aperture Delay Time

Aperture Uncertainty

ps rms

FUNCTIONAL SPECIFICATIONS

= +25°C, +V

= +5V, V

= 5.2V, 10MHz sampling rate, and a minimum 3 minute warmup unless otherwise specified.)

PARAMETERS

MIN.

TYP.

MAX.

UNITS

Operating Temp. Range, Case

ADS-947MC, GC

+70

°C

ADS-947ME, GE, QL

+100

° C

Thermal Impedance

°C/Watt

Storage Temperature Range

+150

°C

Package Type

24-pin, metal-sealed, ceramic DDIP or SMT

Weight

0.46 ounces (13 grams)

ABSOLUTE MAXIMUM RATINGS

PARAMETERS

LIMITS

UNITS

+5V Supply (Pins 13, 22)

0 to +6

Volts

5.2V Supply (Pin 20)

0 to 5.5V

Volts

Digital Input (Pin 18)

0.3 to +V

+0.3

Volts

Analog Input (Pin 21)

±5

Volts

Lead Temperature (10 seconds)

+300

°C

PHYSICAL/ENVIRONMENTAL

ADS-947

+25°C

0 to +70°C

40 to +100°C

DYNAMIC PERFORMANCE (Cont.)

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

UNITS

S/H Acquisition Time

( to ±0.003%FSR, 4V step)

Overvoltage Recovery Time

100

A/D Conversion Rate

MHz

DIGITAL OUTPUTS

Logic Levels

Logic "1"

+2.4

Volts

Logic "0"

+0.4

Volts

Logic Loading "1"

Logic Loading "0"

Output Coding

Offset Binary

POWER REQUIREMENTS

Power Supply Ranges

+5V Supply

+4.75

+5.0

+5.25

+4.75

+5.0

+5.25

+4.9

+5.0

+5.25

Volts

5.2V Supply

4.75

5.2

5.45

4.75

5.2

5.45

4.9

5.2

5.45

Volts

Power Supply Currents

+5V Supply

+250

+260

+250

+260

+250

+260

5.2V Supply

200

210

200

210

200

210

Power Dissipation

2.0

2.25

2.0

2.25

2.0

2.25

Watts

Power Supply Rejection

±0.1

%FSR/%V

Footnotes:

TECHNICAL NOTES

1. Obtaining fully specified performance from the ADS-947

requires careful attention to pc card layout and power

supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal

performance, tie all ground pins (14, 19 and 24) directly to a

large analog ground plane beneath the package.

Bypass all power supplies to ground with 4.7µF tantalum

capacitors in parallel with 0.1µF ceramic capacitors. Locate

the bypass capacitors as close to the unit as possible.

2. The ADS-947 achieves its specified accuracies without the

need for external calibration. If required, the device's small

initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 2 and 3.

When using this circuitry, or any similar offset and gain

calibration hardware, make adjustments following warmup.

To avoid interaction, always adjust offset before gain.

3. Applying a start convert pulse while a conversion is in

progress (EOC = logic 1) will initiate a new and inaccurate

conversion cycle. Data for the interrupted and subsequent

conversions will be invalid.

4. A passive bandpass filter is used at the input of the A/D for

all production testing.

Figure 2. Optional ADS-947 Gain Adjust Calibration Circuit

All power supplies should be on before applying a start convert pulse. All

supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.

Contact DATEL for other input voltage ranges.

A 10MHz clock with a 20ns positive pulse width is used for all production

testing. See Timing Diagram, figure 4, for more details.

To Pin 21
of ADS-947

SIGNAL

INPUT

GAIN

ADJUST

1.98k

+5V

This is the time required before the A/D output data is valid once the analog

input is back within the specified range. This time is only guaranteed if the
input does not exceed ±2.2V (S/H saturation voltage).

The minimum supply voltages of +4.9V and 5.1V for ±V

are required

for 40°C operation only. The minimum limits are +4.75V and 4.95V
when operating at +125°C

Effective bits is equal to:

(SNR + Distortion) 1.76 + 20 log

Full Scale Amplitude

Actual Input Amplitude

6.02

ADS-947

CALIBRATION PROCEDURE

Any offset and/or gain calibration procedures should not be

implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of

adjustment for the circuits in Figures 2 and 3 are guaranteed to

compensate for the ADS-947's initial accuracy errors and may
not be able to compensate for additional system errors.

A/D converters are calibrated by positioning their digital outputs

exactly on the transition point between two adjacent digital

output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"

equally between on and off. Other approaches employ digital

comparators or microcontrollers to detect when the outputs
change from one code to the next.

Offset adjusting for the ADS-947 is normally accomplished at

the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output

transition ideally occurs when the applied analog input is

+½ LSB (+122µV).

Gain adjusting is accomplished when all bits are 1's and the

LSB just changes from a 1 to a 0. This transition ideally occurs

when the analog input is at +full scale minus 1½ LSB's
(+1.99963V).

Zero/Offset Adjust Procedure

1. Apply a train of pulses to the START CONVERT input (pin

18) so the converter is continuously converting.

2. Apply +122µV to the ANALOG INPUT (pin 21).

3. Adjust the offset potentiometer until the output bits are

10 0000 0000 0000 and the LSB flickers between 0 and 1.

Gain Adjust Procedure

1. Apply +1.99963V to the ANALOG INPUT (pin 21).

2. Adjust the gain potentiometer until all output bits are 1's and

the LSB flickers between 1 and 0.

3. To confirm proper operation of the device, vary the input

signal to obtain the output coding listed in Table 2.

BIPOLAR

INPUT VOLTAGE

OFFSET BINARY

SCALE

(±2V RANGE)

MSB

LSB

+FS 1 LSB

+1.99976

11 1111 1111 1111

+3/4 FS

+1.50000

11 1000 0000 0000

+1/2 FS

+1.00000

11 0000 0000 0000

0.00000

10 0000 0000 0000

1/2 FS

1.00000

01 0000 0000 0000

3/4 FS

1.50000

00 1000 0000 0000

FS +1 LSB

1.99976

00 0000 0000 0001

2.00000

00 0000 0000 0000

Table 2. Output Coding for Bipolar Operation

INPUT VOLTAGE

ZERO ADJUST

GAIN ADJUST

RANGE

+½ LSB

+FS 1½ LSB

±2V

+122µV

+1.99963V

Table 1. Gain and Zero Adjust

Figure 3. Typical ADS-947 Connection Diagram

0.1µF

4.7µF

22, 13

ADS-947

5.2V

20k

0.1µF

4.7µF

+5V

BIT 1 (MSB)

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

BIT 9

BIT 10

BIT 11

BIT 12

BIT 13

BIT 14 (LSB)

DATA VALID

ANALOG

INPUT

START

CONVERT

A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.

ZERO/

OFFSET

ADJUST

ADS-947

Electrically-insulating, thermally-conductive "pads" may be

installed underneath the package. Devices should be soldered

to boards rather than socketed, and of course, minimal air flow
over the surface can greatly help reduce the package

temperature.

In more severe ambient conditions, the package/junction

temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.

See Ordering Information for the assigned part number. See

page 1-183 of the DATEL Data Acquisition Components Catalog
for more information on the HS Series. Request DATEL

Application Note AN8, "Heat Sinks for DIP Data Converters",

or contact DATEL directly, for additional information.

THERMAL REQUIREMENTS

All DATEL sampling A/D converters are fully characterized
and specified over operating temperature (case) ranges of

0 to +70°C and 40 to +100°C. All room temperature

= +25°C) production testing is performed without the use

of heat sinks or forced air cooling. Thermal impedance

figures for each device are listed in their respective

specification tables.

These devices do not normally require heat sinks, however,

standard precautionary design and layout procedures should

be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal

runs to and from the device, should be as heavy as possible

to help conduct heat away from the package.

Figure 4. ADS-947 Timing Diagram

START

CONVERT

OUTPUT

DATA

INTERNAL S/H

N+1

DATA N-1 VALID

50ns typ.
(±5ns)

20ns

typ.

Acquisition Time

35ns

typ.

Hold

65ns typ.

10ns typ.

DATA N VALID

INVALID DATA

50ns typ.

Notes:
1. Scale is approximately 5ns per division. Sampling rate = 10MHz.
2. The start convert pulse must be between 20 and 50ns wide or between 80 and 100ns wide (when sampling at 10MHz)

to ensure proper operation. For sampling rates less than 10MHz, the start pulse can be wider than 85nsec, however a minimum

pulse width low of 15nsec should be maintained. A 10MHz clock with a 20nsec positive pulse width is used for all production testing.

INTERNAL EOC

25ns typ.

Conversion Time

70ns typ.

DATA N-1 VALID

DATA N VALID

DATA

VALID

40ns typ.

(±5ns)

40ns typ.

(±5ns)

40ns max.

15ns

(61ns min., 68ns max.)

(22ns min., 28ns max.)

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