* This specification are subject to be changed without notice.

EM73962A

4-BIT MICROCONTROLLER

10.8.2001

GENERAL DESCRIPTION

EM73962A is an advanced single chip CMOS 4-bit micro-controller. It contains 16K-byte ROM, 372-nibble
RAM, 4-bit ALU, 13-level subroutine nesting, 22-stage time base, two 12-bit timer/counters for the kernal
function. EM73962A also contains 5 interrupt sources, 3 I/O ports (including 1 input port and 2 bidirection ports),
LCD display (40x8), built-in sound generator.
Except low-power consumption and high speed, EM73962A also have a sleep mode for power saving function.
EM73962A is suitable for appliaction in many fields, for example : family appliance, consumer products, hand
held games and the toy controller ... etc.

FEATURES

· Operation voltage

: 2.4V to 5.0V.

· Clock source

: Single clock system using RC. oscillator.

External clock and internal clock is available by mask option.

· Oscillation frequency : 480K, 1M, 2M and 4M Hz is available by mask option.
· Instruction set

: 107 powerful instructions.

· Instruction cycle time : Up to 2us for 4 MHz.
· ROM capacity

: 16384 X 8 bits.

· RAM capacity

: 372 X 4 bits.

· Input port

: 1 port (P0.0-P0.3) and sleep/hold releasing function are available by mask option.

(each input pin is pull-up and pull-down resistor available by mask option).

· Bidirection port

: 1 port (P8). P8(0..3) and sleep/hold releasing function are available by mask option.

· 12-bit timer/counter

: Two 12-bit timer/counters are programmable for timer, event counter and pulse width

measurement.

· Built-in time base counter : 22 stages.
· Subroutine nesting

: Up to 13 levels.

· Interrupt

: External . . . . . 2 input interrupt sources.

Internal . . . . . . 2 Timer overflow interrupts.

1 Time base interrupt.

· LCD driver

: 40 X 8 dots, 1/8 duty, LCD bias is 1/4 and 1/5 available by mask option, LCD bias

resistor is 20K X 5 and 10K X 5 available by mask option.

· Sound effect

: Tone generator, random generator and volume control.

· Power saving function: Sleep mode and Hold mode.
· Package type :

EM73962AH Chip form 62 pins.

* This specification are subject to be changed without notice.

EM73962A

4-BIT MICROCONTROLLER

10.8.2001

Symbol

Pin-type

Function

D D

Power supply (+)

Vss

Power supply (-)

RESET

RESET-A

System reset input signal, low active
mask option :

none
pull-up

CLK

OSC-C

RC or external clock source connecting pin

P0.(0..3)/WAKEUP0..3

INPUT-B

4-bit input port with Sleep/Hold releasing function
mask option :

wakeup enable, pull-up
wakeup enable, none
wakeup disable, pull-up
wakeup disable, pull-down
wakeup disable, none

P8.0(INT1)/WAKEUPA I/O-L

2-bit bidirection I/O port with external interrupt sources input and Sleep

P8.2(INT0)/WAKEUPC

/Hold releasing function
mask option :

wakeup enable, push-pull
wakeup disable, push-pull
wakeup disable, open-drain

P8.1(TRGB)/WAKEUPB I/O-L

2-bit bidirection I/O port with time/counter A,B external input and Sleep

P8.3(TRGA)/WAKEUPD

/Hold releasing function
mask option :

wakeup enable, push-pull

wakeup disable, push-pull
wakeup disable, open-drain

SOUND

Built-in sound effect output

COM0~COM7

LCD common output pins

SEG0~SEG39

LCD segment output pins

TEST

No connecting for COB

FUNCTION BLOCK DIAGRAM

PIN DESCRIPTIONS

Interrupt

Control

Time

Base

Timer/Counter

(TA,TB)

System Control

Instruction Decoder

Instruction Register

ROM

Data Bus

Reset

Control

Clock

Generator

Timing

Generator

Sleep Mode

Control

Data pointer

ACC

ALU

Flag

Stack pointer

Stack

ROM

I/O Control

P0.0/WAKEUP0
P0.1/WAKEUP1
P0.2/WAKEUP2
P0.3/WAKEUP3

P8.0(INT1)/WAKEUPA

P8.1(TRGB)/WAKEUPB

P8.2(INT0)/WAKEUPC

P8.3(TRGA)/WAKEUPD

RESET

CLK

SOUND GEN.

LCD Driver

COM0~COM7

SOUND

SEG0~SEG39

* This specification are subject to be changed without notice.

EM73962A

4-BIT MICROCONTROLLER

10.8.2001

SCALL, subroutine call entry address

Data table for
[LDAX],[LDAXI]
instruction

Subroutine call entry address
designated by [LCALL a]
instruction

FUNCTION DESCRIPTIONS

PROGRAM ROM ( 16K X 8 bits ) for EM73962A

16 K x 8 bits program ROM contains user's program and some fixed data.

The basic structure of program ROM can be divided into 4 parts.
1. Address 0000h: Reset start address.
2. Address 0002h - 000Ch : 5 kinds of interrupt service routine entry addresses.
3. Address 000Eh - 0086h : SCALL subroutine entry address, only available at 000Eh, 0016h, 001Eh, 0026h,

002Eh, 0036h, 003Eh, 0046h, 004Eh, 0056h, 005Eh, 0066h, 006Eh, 0076h, 007Eh, 0086h.

4. Address 0000h - 07FFh : LCALL subroutine entry address.
5. Address 0000h - 1FFFh : Except used as above function, the other region can be used as user's program region.

address Bank 0 :

0000h

Reset start address

0002h

INT0; interrupt service routine entry address

0004h
0006h

TRGA

0008h

TRGB

000Ah

TBI

000Ch

INT1

000Eh
0086h

:
:

07FFh
0800h

0FFFh

1000h

Bank 1

1FFFh

Bank 2

Bank 3

* This specification are subject to be changed without notice.

EM73962A

4-BIT MICROCONTROLLER

10.8.2001

User's program and fixed data are stored in the program ROM. User's program is according the PC value
to send next executed instruction code.
The 16Kx8 bits program ROM can be divided into 4 banks. There are 4Kx8 bits in each bank.
The bank of the program ROM is selected by P3(1..0). The program counter is a 13-bit binary counter. The PC
and P3 are initialized to "0" during reset.
When P3(1..0)=00B, the bank0 and bank1 of program ROM will be selected. P3(1..0)=01B, the the bank0 and
bank2 will be selected. P3(1..0)=01B, the bank0 and bank3 will be selected.

Address

P3=xx00B

P3=xx01B

P3=xx10b

0000h

:
:

Bank0

0FFFh

1000h

:
:

Bank1

Bank2

Bank3

1FFFh

PROGRAM EXAMPLE:

BANK 0

START:

:
:
:
LDIA

#00H

; set program ROM to bank1

OUTA P3
B

XA1

XA :

:
:
LDIA

#01H

; set program ROM to bank2

OUTA P3
B

XB1

XB :

:
:
LDIA

#02H

; set program ROM to bank3

OUTA P3
B

XC1

XC :

:
:
B

XD :

:
:
:

; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

BANK 1

XA1 :

:
:
B

XA2 :

* This specification are subject to be changed without notice.

EM73962A

4-BIT MICROCONTROLLER

10.8.2001

XA2

; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

BANK 2

XB1 :

:
:
B

XB2 :

:
B

XB2

; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

BANK 3

XC1 :

:
:
B

XC2 :

:
B

XC2

Fixed data can be read out by table-look-up instruction. Table-look-up instruction is depended on the Data
Pointer (DP) to ROM address, then to get the ROM code data :

LDAX

Acc

ROM[DP]

LDAXI

Acc

ROM[DP]

,DP+1

DP is a 12-bit data register which can store the program ROM address to be the pointer for the ROM code data.
First, user load ROM address into DP by instruction "STADPL, STADPM, STADPH", then user can get the
lower nibble of ROM code data by instruction "LDAX" and higher nibble by instruction "LDAXI"
PROGRAM EXAMPLE: Read out the ROM code of address 1777h by table-look-up instruction.

LDIA #07h;
STADPL ; [DP]

07h

STADPM ; [DP]

07h

STADPH

; [DP]

07h, Load DP=777h

:
LDL #00h;
LDH #03h;
LDAX

; ACC

STAMI

; RAM[30]

LDAXI

; ACC

STAM

; RAM[31]

;
ORG 1777h
DATA 56h;

DATA RAM ( 372-nibble )

There is total 372 - nibble data RAM from address 000 to 17Fh
Data RAM includes 3 parts: zero page region, stacks and data area.

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