1
EM MICROELECTRONIC-MARIN SA
V7039
High Efficiency Programmable Linear Power Supply
with Accurate Power Surveillance and
Software Monitoring with Crystal Oscillator
Features
Supply current 10
A max. for the load current range
0 50 mA, 5 V regulated output
Digitally programmable voltage regulator, 5 V, 3 V or 2 V
Low dropout voltage, typically 4 mV at 100
A load
Fully operational for unregulated DC input voltage
up to 10 V and regulated output voltage down to 1.5 V
Short circuit and thermal protection
Battery fail warning, regulator input tested (5 mA for
300
s) every 15 minutes
Power-on reset and power-down reset
Watchdog with 2 s timeout
Watchdog offers the possibility to detect a micro-
controller in sleep mode
Pulse output every 15 minutes for time management
Clock output with three modes of operation:
1. A 92 s retriggerable monostable
2. A 2 kHz square wave for piezo electric buzzer
3. A 32.768 kHz system clock
-40 to +85
C temperature range
DIP16 and SO16 packages
Description
The V7039, with a total current consumption of 10
A
max., is very suited to battery driven portable microcon-
troller systems. Combined on one IC are a digitally pro-
grammable voltage regulator, power surveillance and
battery fail circuitry, a watchdog, pulse and clock outputs
and a crystal oscillator. The state of the battery supply is
sampled every 15 minutes by drawing a current of 5 mA
for 30 ms. If the voltage dropped across a resistor brings
the voltage at the pad PT below the reference voltage of
1.3 V, then the PF pin goes active.
The P15 output supplies a pulse of 30 ms every 15 minu-
tes which allows regular long term time management by
the user's software. The CLK output can supply a retrig-
gerable monostable with a timeout of 92 seconds or
square waves of 2 kHz or 32.768 kHz.
The watchdog function monitors software execution by
checking the TCL signal for a change of state within a
timeout period of 2 seconds. If the watchdog times out,
RES is activated; the WD output is also activated to indi-
cate to software that a watchdog time out caused the
reset. If the microcontroller TCL output is put in a high
impedance condition, the V7039 will detect this condition
as a microcontroller in the sleep mode and prevent its
watchdog from timing out.
Applications
Security systems
Remote smart sensors
Pagers
Battery operated and portable products
Typical Operating Configuration
Pin Assignment
Fig. 1
V7
03
9
PF
WD
V
SS
XI
XO
TCL
MS0
MS1
VS0
VS1
V
IN
CLK
OUT
PT
V
OUT
RES
DIP16/SO16
TCL
P15
PF
CLK
OUT
Fig. 2
V7039
V
OUT
XI
XO
VS0
VS1
MSO
PT
V
SS
V
IN
RES
WD
MS1
2
V7039
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Voltage V
IN
to V
SS
V
IN
- 0.5 to + 11 V
Max. voltage at any signal pin
V
MAX
V
OUT
+ 0.3 V
Min. voltage at any signal pin
V
MIN
V
SS
0.3 V
Operating junction temp. range
T
J
-40 to +125 C
Storage temperature
T
STO
- 65 to + 150 C
Electrostatic discharge max. to
MIL-STD-883C method 3015
V
Smax
1000 V
Max. soldering conditions
T
Smax
250 C x 10 s
Table 1
Stresses above these listed maximum ratings may
cause permanent damage to the device. Exposure be-
yond specified operating conditions may affect device
reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static precau-
tions must be taken as for any other CMOS component.
Unless otherwise specified, proper operation can only
occur when all terminal voltages are kept within the
supply voltage range. Unused inputs must always be
tied to a defined logic voltage level.
Operating Conditions
Parameter
Symbol Min. Typ.
Max.
Units
Operating junction
temperature
T
J
-40
+85
C
Supply voltage
1)
V
IN
2
10
V
Operating V
OUT
voltage
1)
V
OUT
1.5
6.0
V
I
OUT
2)
at V
OUT
= 5 V
I
OUT
50
mA
at V
OUT
= 3 V
I
OUT
20
mA
at V
OUT
= 2 V
I
OUT
10
mA
Thermal resistance
3)
(junction to ambient )
- DIP16
R
th(j-a)
160
C/W
- SO16
R
th(j-a)
240
C/W
Decoupling capacitors
on V
IN
and V
OUT
C
T
100
nF
Load capacitors on V
IN
and V
OUT
4)
C
L
2.2
F
Crystal characteristics
Frequency
f
32.768
kHz
Load capacitance
C
L
8.2
pF
Series resistance
R
S
35
50
k
Table 2
1)
Full operation quaranteed. If the regulator is bypassed (ie.
V
IN
tied to V
OUT
) the V
OUT
voltage must not exceed 6.0 V.
2)
I
OUT
will not apply for all possible combinations of input
voltage and output current. Combinations that would
require the V7039 to work above the maximum junction
temperature (85
C) must be avoided.
3
The thermal resistance from junction to ambient specified
assumes that the package is soldered onto a PCB.
4)
The 2.2
F capacitor must have an effective resistance of
5
or less and a resonant frequency of above 500 kHz.
3
V7039
Electrical Characteristics
V
IN
= 7 V, V
OUT
programmed for 5 V, I
L
= 0, PT pulled up to V
IN
with 700
, V
SS
= 0 V, -40
C
T
J
+85
C,
unless otherwise specified
Parameter
Symbol Test Conditions
Min.
Typ.
Max.
Unit
Static supply current
I
DD
V
IN
= 10 V, 0
I
L
50 mA,
I/P
S
at V
SS
7
12
A
Dynamic supply current
I
DD
CLK
OUT
programmed for 2 kHz,
output load capacitance
50 pF
8.5
14
A
Output voltage
V
OUT
0
I
L
50 mA
4.75
5
5.25
V
Output voltage
V
OUT
V
IN
= 4.5 V, V
OUT
programmed
for 3 V, 0
I
L
20 mA
2.85
3
3.15
V
Output voltage
V
OUT
V
IN
= 3 V, V
OUT
programmed
for 2 V, 0
I
L
10 mA
1.9
2
2.1
V
Line regulation
V
LINE
6 V
V
IN
10 V, I
L
= 10 mA
0.03
0.35
%
Load regulation
V
L
0
I
L
30 mA
0.4
1
%
Dropout voltage
1)
V
DROPOUT
I
L
= 100
A
4
50
mV
Dropout voltage
1)
V
DROPOUT
I
L
= 30 mA, T
J
= 25
C
850
mV
Current limit
I
Lmax
V
OUT
tied to V
SS
180
mA
Inputs
Input logic high
V
IH
V
OUT
-1
V
Input logic low
V
IL
V
OUT
+1
V
W
IN
high impedance detect
current
I
Z
50
120
180
A
PT test voltage
V
T
1.2
1.3
1.4
V
PT sink current
I
T
4.5
5.5
6.5
mA
Outputs
CLK
OUT
output logic high
V
OH
I
OH
= 3 mA
V
OUT
-0.4
V
CLK
OUT
output logic low
V
OL
I
OL
= 5 mA
0.4
V
Output logic high
V
OH
I
OH
= 5 mA
V
OUT
-0.4
V
Output logic low
V
OL
I
OL
= 8 mA
0.4
P15 output logic high
V
OH
I
OH
= 0.25 mA
2)
V
OUT
-1.2
V
P15 output logic low
V
OL
I
OL
= 8 mA
0.4
V
Table 3
1)
The dropout voltage is defined as the V
IN
to V
OUT
differential at which V
OUT
drops 100 mV below its nominal value measured at a
1 V differential. The supply current does not increase significantly in dropout.
2)
The P 15 output has a 4 k
resistor in serie with the Pchannel buffer. This makes possible to force this output to low (
2 V
for 5 V V
OUT
) to perform a battery test.
4
V7039
Timing Characteristics
V
IN
= 7 V, V
OUT
programmed for 5 V, I
L
= 0, PT pulled up to V
IN
with 700
, V
SS
= 0 V, -40
C
T
J
+85
C,
unless otherwise specified
Parameter
1)
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Power-on reset delay
T
POR
30
ms
Reset pulse width
T
RES
30
ms
Watchdog timeout
T
WD
1.93
2.0
s
TCL pulse width
T
TCL
31
s
TCL high impedance detection period P
TCLZ
60
ms
TCL high impedance detection width
T
TCLZ
30.5
s
P15 output period
P
P15
15
min
P15 output pulse width
T
P15
30
ms
CLK
OUT
programmed for monostable
timeout
T
CLKOUT
92
96
s
CLK
OUT
programmed for 2 kHz clock
f
CLKOUT
2.048
kHz
CLK
OUT
programmed for 32 kHz clock
f
CLKOUT
32.768
kHz
Logic transition times for all O/P
S
T
TR
Load = 50 pF
300
600
ns
Table 4
1)
The accuracy of the timing parameters is given by the accuracy of the external crystal plus or minus 100 ppm unless
otherwise specified.
Timing Waveforms
Watchdog Timer
Watchdog and Reset Timing
Watchdog
cleared
Watchdog
initialized
T
TCL
f 32.768 kHz
(external crystal)
TCL
Watchdog
timer
Watchdog
cleared
Watchdog
initialized
Fig.3
High impedance
T < T
WD
T
RES
T
WD
T < T
WD
T < T
WD
P
TCLZ
Fig. 4
TCL
Watchdog
timer
WD
RES
5
V7039
Monostable Timing
15 Minute Pulse on P15 and Battery Test
TCL High Impedance Detection
Block Diagram
T
CLKOUT
Fig. 5
MS1 at V
SS
MSO
CLK
OUT
P
P15
T
P15
Fig. 6
P15
Battery
test
T
TCLZ
T
TCLZ
P
TCLZ
Fig. 7
f 32.768 kHz
(external crystal)
TCL 100
A
pull-up
TCL 100
A
pull-down
Regulator
and
voltage
select
Interrupt
timing
Monostable
timing
Watchdog
timer
Battery
test
Crystal oscillator
and regulator
Pre-
scaler
Mode
select
3 to 1
decoder
VS1 VS0
V
IN
PT
X0
X1
MS0
MS1
TCL
WD
RES
CLK
OUT
P15
PF
V
OUT
Fig. 8
6
V7039
Pin Description
Pin Name
Function
1
V
OUT
Voltage regulator output
2
XI
32.768 kHz crystal input
3
XO
32.768 kHz crystal output
4
VS0
Voltage regulator programming input 0
5
VS1
Voltage regulator programming input 1
6
M
SO
Mode select input 0
7
PT
Test voltage
8
V
SS
GND terminal
9
M
S1
Mode select input 1
10
CLK
OUT
Clock output
11
PF
Active high battery fail output
12
P15
15 minutes pulse output
13
TCL
Watchdog timer clear input
14
WD
Active low watchdog timeout output
15
RES
Active low reset output
16
V
IN
Voltage regulator input
Table 5
Functional Description
Voltage Regulator
The V7039 has a digitally programmable voltage regula-
tor. The logic levels on the inputs VS0 and VS1 program
the regulator for 5 V, 3 V or 2 V output in accordance with
Table 6. The regulator output voltage can be changed at
any time, for example normal program execution could
be at 5 V and for standby mode the microcontroller could
switch to 3 V. The regulator has current limit and thermal
protection. If the regulator is not needed it can be
bypassed by short circuiting V
IN
to V
OUT
; in this
case the voltage at V
IN
must not exceed 6 V; all other
features function as normal.
V
S1
V
S0
V
OUT
0
0
5 V
0
1
3 V
1
0
2 V
1
1
Factory test mode
Table 6a
V
OUT
V
POR
2 V
1.3 V
3 V
1.5 V
5 V
2.5 V
Table 6b
The low supply current (7
A typically over the tempera-
ture range) and low dropout voltage makes the V7039
very suitable for low power battery operated systems.
The V
IN
ranges from 2 to 10 V which covers most battery
values on the market. Two decoupling capacitors should
be added, one for V
IN
and one for V
OUT
and their value
should be 100 nF. A load capacitor of
2.2
F is needed
on V
OUT
for stability. To achieve good line regulation a
capacitor of
2.2
F is needed on V
IN
.
Care should be taken not to exceed the maximum ope-
rating junction temperature (+85
C). The power
dissipation within the V7039 can be approximated by the
formula:
P = (V
IN
V
OUT
) * I
OUT
The maximum continuous power dissipation at a given
ambient temperature can be calculated using the for-
mula:
P
MAX
= (85
C T
A
) / R
th(j-a)
where R
th(j-a)
is the thermal resistance from the junction
to the ambient and is specified in Table 2. The R
th(j-a)
given in Table 2 assumes that the package is soldered
to a PCB.
The formula for maximum continuous power dissipation
assumes a constant load (ie.
100 s). The transient
thermal resistance for a single pulse is much lower than
the continuous value. For example the V7039 in DIP16
package will have an effective thermal resistance from
the junction to the ambient of about 15
C/W for a single
100 ms pulse.
Power-up and Power-down
When the power is applied the RES output stays low un-
til 30 ms after the V
OUT
has reached its POR voltage level
(V
POR
) this is the POR time. If the voltage at V
OUT
falls
below the V
POR
voltage level a reset is generated.
Test
The V
IN
power supply is tested every 15 minutes by
drawing 5 mA of current through a resistor connected to
V
IN
(see Fig. 6 and 11). The test time is 30 ms. During
this time the voltage at the power test (PT) pin is
compared to the internal voltage reference (V
T
) of 1.3 V.
If the voltage at the PT pin is lower than V
T
, the PF output
is taken active high. The average current due to the
power test is 0.17
A and so is not significant. The
resistor should be chosen to suit the particular battery
voltage being used. It is possible to perform a V
IN
power
test by forcing the P15 output to low.
Reset and Watchdog
The watchdog circuit monitors the activity of the micro-
controller. If the user's software does not send a pulse to
the TCL input within the watchdog timeout period, a RES
pulse is generated. The TCL input is sampled at the rate
of 32.768 kHz or every 31
s. If no change of state is de-
tected inside the timeout period of 2 seconds, the
watchdog timer times out and RES is taken active (see
Fig. 4). If RES goes active because of a watchdog
timeout, then the WD pin goes active low to indicate to
the microcontroller that the cause of the reset is a
watchdog timeout and not a drop-in voltage. If a level
change on TCL appears before the 2 seconds, the
watchdog timer is cleared and initialized (see Fig.3).
The WD output is deactivated by a change of state of the
TCL input or the detection of a high Z condition on the
TCL pad as explained below (see Fig.4). The WD output
goes inactive only after the RES has gone inactive.
Many low-power microcontroller systems do not run
100% of the time, instead they are put in a sleep mode
where an interrupt or reset can awaken them, for
example a key-push on a user interface could be used to
cause an interrupt to the microcontroller. The V7039
offers the possibility to detect a microcontroller in the
7
V7039
sleep mode and will prevent its watchdog from timing
out in such a case. If the microcontroller TCL output is
put into a tri-state condition (high Z), the V7039 will
detect this condition and prevent its watchdog from
timing out. The V7039 uses the high impedance state on
TCL to detect a microcontroller in the sleep mode as
opposed to software mal-functioning. The TCL pad is
subjected to an internally produced 100
A pull-up and
then a 100
A pull-down every 60 ms(see Fig.4 and 7). If
the TCL pad follows both pulses then the microcontroller
is in high Z and the watchdog timer is prevented from
timing out. If the microcontroller is not in high Z, then the
pull-up and pull-down pulses will not be able to fight
against the level on the pad.
CLK
OUT
The CLK
OUT
output can be programmed for one of three
possible modes of operation:
1. It can provide a monostable timeout every 92 s which
is retriggerable by a falling edge on MS0.
2. It can provide a 2 kHz square wave which could be
useful for activating a piezo electric buzzer.
3. It can provide a system clock of 32. 768 kHz.
The logic levels on mode select inputs MS0 and MS1
program the CLK
OUT
mode (see Table 7).
MS1
MS0
CLK
OUT
0
Falling edge
Initializes the monostable
0
0
Monostable pulse 92 s after
initialisation
1
0
2 kHz frequency
1
1
32.768 kHz frequency
Table 7
Oscillator
Use a crystal of nominal C
L
= 8.2 pF as specified in the
section "Operating Conditions". The MX series from
Microcrystal is recommended. The accuracy of the time
keeping is dependent upon the frequency tolerance and
the load capacitance of the crystal. To measure the
accuracy use the CLK
OUT
with MS0 and MS1 tied to
V
OUT
11.57 ppm correspond to one second a day.
Crystal Layout
In order to ensure correct oscillator operation we recom-
mend the following standard practices:
- Keep traces as short as possible.
- Use a guard ring connected to V
SS
around the crystal.
Fig. 9 shows the recommended layout.
Layout
Typical Applications
V
SS
V
SS
XO
XI
V7039
Fig. 9
MS1 CLK
OUT
PF
P15
TCL
WD
RES
V
IN
V7039
V
SS
PT
MS0
VS1
VS0
XO
XI
V
OUT
CDT TIME TENS IT1
/
4
W
IN
W
OUT
RAZ V
DD
Microcontroller
V
SS
Voltage select pins
V
CC
One shot
activation
Fig. 12
MS1
MS0
VS1
VS0
V
OUT
CLK
OUT
PF
WD
RES
P15
V
IN
PT TCL
V7
03
9
Address V
DD
decoder
V
DD
ROM
CE
V
DD
RAM
CE
V
DD
OFC LCD module
CLK STR DAT
A
FIRQ RES IRQ NMI
V
DD
V
OUT
Adress bus
Data bus
Fig. 11
Microprocessor
8
V7039
Package Information
Dimensions of 16-Pin SOIC Package
Min Nom Max
A 1.55 1.63 1.73
A1 0.12 0.15 0.25
B 0.35 0.41 0.49
C 0.19 0.20 0.25
D 9.80 9.93 9.98
E 3.81 3.94 3.99
e
1.27
H 5.84 5.99 6.20
L 0.41 0.64 0.89
2
7
8
9
10 15 16
H
L
0 - 8
C
E
A1
A
B
e
D
Dimensions in mm
Fig. 13
Dimensions of 16-Pin Plastic DIP Package
A1
A2
A
L
e
b2
eB
eA
C
b3
b
E
Dimensions in mm
1
2
7
8
9
10
15
16
Min.
Nom.
Max.
Min.
Nom.
Max.
A
4.32 D
18.9 19.0 19.2
A1 0.38
E
7.62 7.87 8.25
A2 2.92 3.30 4.95 E1 6.09 6.40 6.60
b
0.38 0.45 0.56 e
2.54
b2 1.39 1.52 1.65 eA
7.62
b3 0.76 0.99 1.14 eB
10.92
C
0.20 0.25 0.31 L
3.17
3.43
E1
Fig. 14
9
V7039
Ordering Information
When ordering, please specify complete Part Number.
Part Number
Package
Delivery Form Package Marking
(first line)
V7039SO16A
16-pin SOIC
Stick
V70392 16S
V7039SO16B
16-pin SOIC
Tape & Reel
V70392 16S
V7039DL16A
16-pin plastic DIP
Stick
V70392 16
EM Microelectronic-Marin SA, CH - 2074 Marin, Switzerland, Tel. +41 (0)32 75 55 111, Fax +41 (0)32 75 55 403
EM Microelectronic-Marin SA cannot assume any responsibility for use of any circuitry described other than entirely
embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the
circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given
has not been superseded by a more up-to-date version.
2002 EM Microelectronic-Marin SA, 03/02, Rev. C/459
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