87
Real time clock module
Absolute Max. rating
Specifications (characteristics)
Operating range
Frequency characteristics
DC characteristics
External dimensions / Terminal connection
(Unit: mm)
Metal may be exposed on the top or bottom of this product. This won't affect any quality, reliability or electrical spec.
Item
Supply voltage
Input voltage 1
Input voltage 2
Output voltage 1
Output voltage 2
Storage temperature
Item
Power voltage
Clock voltage
Operating temperature
Item
Frequency tolerance
Oscillation start-up time
Frequency temperature
characteristics
Frequency voltage
characteristics
Aging
Item
Power current 1
Power current 2
Power current 3
Power current 4
Power current 5
Power current 6
"H" input voltage
"L" input voltage
"H" output current
"L" output current
Leakage current
Low voltage detection
Symbol
V
DD
V
IN1
V
IN2
V
OUT1
V
OUT1
T
STG
Symbol
V
DD
V
CLK
T
OPR
Symbol
f/f
t
STA
Top
f/V
fa
Symbol
I
DD1
I
DD2
I
DD3
I
DD4
I
DD5
I
DD6
V
IH1
V
IH2
V
IL
V
OH1
V
OH2
V
OH3
V
OL1
V
OL2
V
OL3
V
OL4
V
OL5
V
OL6
I
LK
I
OZ
Min.
0.7 V
DD
0.7 V
DD
GND-0.3
4.5
2.2
2.9
GND
GND
GND
GND
GND
GND
-0.5
-0.5
Typ.
0.65
0.45
3.0
1.7
8.0
5.0
Max.
1.2
0.8
7.5
4.5
20.0
12.0
V
DD
+0.3
6.0
0.3 VDD
5.0
3.0
3.0
GND+0.5
GND+0.8
GND+0.1
GND+0.25
GND+0.4
GND+0.4
0.5
0.5
Unit
A
V
A
Condition
FOE pin
SCL, SDA pins
Input pin
Input pin, V
IN
= V
DD
or GND
INT, SDA pins, V
OUT
= V
DD
or GND
Condition
VDD to GND
FOE pin
SCL, SDA pins
F
OUT
pin
SDA, INT pins
Stored as bare product
after unpacking
Condition
--
--
No condensation
Condition
Ta=+25 C, VDD=3.0 V
Ta=+25 C, VDD=3.0 V
Ta=-10C to +70C,
V
DD
=3.0 V ; Refernce at +25C
Ta=+25 C,
VDD=2.0 V to 5.0 V
Ta=+25 C, VDD=3.0 V
Min.
-0.3
GND-0.3
-55
Min.
1.8
1.6
-40
Range
5
23
3 Max.
+10
-120
2 Max.
5 Max.
Max.
+7.0
VDD+0.3
+8.0
VDD+0.3
+8.0
+125
Max.
5.5
+85
Unit
x 10
-6
s
x 10
-6
x 10
-6
/V
x 10
-6
/year
Unit
V
V
C
Unit
V
C
GND=0V
GND=0V
GND=0V
(GND=0 V, VDD = 1.8 V to 5.5 V, Ta = -40C to +85C)
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
f
SCL
=0 Hz
INT = V
DD
, FOE = GND
F
OUT
; output off ("L" level)
f
SCL
=0 Hz
INT, FOE = V
DD
F
OUT
; 32.768 kHz output ON, CL = 0 pF
f
SCL
=0 Hz
INT, FOE = V
DD
F
OUT
; 32.768 kHz output ON, CL = 30 pF
F
OUT
pin
F
OUT
pin
SDA pin
INT pin
V
DD
=5V, I
OH
=-1mA
V
DD
=3V, I
OH
=-1mA
V
DD
=3V, I
OH
=-100
A
V
DD
=5 V, I
OL
=1mA
V
DD
=3 V, I
OL
=1mA
V
DD
=3 V, I
OL
=100
A
V
DD
=5 V, I
OL
=1mA
V
DD
=3 V, I
OL
=1mA
V
DD
>2 V, I
OL
=3mA
RX-8581NB
(SON 22-pin)
6.3 Max.
4.8
5.0
0.2
1.3
0.5
0.2
R8581
1234A
E
No.
1
2
3
4
5
6
7
8
9
10
11
Pin terminal
INT
GND
(V
DD
)
N.C
SDA
SCL
FOUT
V
DD
FOE
N.C
N.C
No.
22
21
20
19
18
17
16
15
14
13
12
Pin terminal
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
0.1
#22
#1
#11
#14
RX-8581JE
(VSOJ 20-pin)
No.
1
2
3
4
5
6
7
8
9
10
Pin terminal
N.C
N.C
FOE
V
DD
FOUT
SCL
SDAT
(V
DD
)
GND
INT
No.
20
19
18
17
16
15
14
13
12
11
Pin terminal
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
N.C
#20
#11
#1
#10
R8581
1234A
E
1.5 Max.
5.4
1.3
(0.75)
(0.75)
7.0
0.3
6.2 Max.
0.65
0.22 0 Min.
RX-8581SA
(SOP 14-pin)
No.
1
2
3
4
5
6
7
Pin terminal
N.C
SCL
SDA
N.C
GND
N.C
INT
No.
14
13
12
11
10
9
8
Pin terminal
F
OUT
N.C
N.C
V
DD
FOE
N.C
N.C
#1
#7
#8
#14
R8581
1234A
E
7.4
0.2
3.2
0.1
1.2
1.27
0.35
5.0
3.1
10.1
0.2
0.15
0.6
0.05 Min.
0
to 10
1 Equivalent to 1 minute of monthly deviation (excluding offset.)
2 Please ask tighter tolerance
1
2
I C-BUS INTERFACE REAL TIME CLOCK MODULE
RX-8581SA/JE/NB
Built-in frequency adjusted 32.768 kHz crystal unit.
Compliant with I
2
C high-speed bus specifications. (400 kHz)
Alarm and Timer IRQ function are Available.
32.768 kHz clock frequency output. (Duty 50 5%)
Automatic adjustment for leap year.
Low backup current : 0.5 A/3 V (Typ.)
Wide operating voltage range : 1.8 V to 5.5 V
Wide timekeeper voltage range : 1.6 V to 5.5 V
Available as small package. (SON-22pin)
2
Actual size
The I
2
C-Bus is a trademark of Philips Electronics N.V.
The details are mentioned in the application manual.
http://www.epsondevice.com
Product number (please refer to page 2)
Q41 8 5 8 1 5 x x x x x 0 0
Q41 8 5 8 1 9 x 0 0 0 2 0 0
Q41 8 5 8 1 7 x x x x x 0 0
RTC-8581NB
RTC-8581JE
RTC-8581SA
AC characteristics
Block diagram
Register table
Timing chart
Protocol
SCL
Start
Condition (s)
Start
Condition (s)
Stop
Condition (P)
t
SU;STO
t
SP
t
HD;DAT
t
SU;STA
t
HD;STA
t
SU;STA
t
LOW
t
HIGH
1/f
SCL
(A)
(P)
(S)
t
f
t
r
(S)
t
BUF
t
SU;DAT
t
HD;STA
Bit 7
MSB (A7)
Bit6
(A6)
Bit0
LSB
(R/W)
ACK
(A)
SDA
I
2
C-Bus
interface
circuit
Fout controller
Divider
INT
SDA
F
OUT
F
OE
SCL
Clock and Calendar
Timer register
Alarm register
Control register
and
System Controller
Interrupts controller
OSC
32.768 kHz
0 : Always set this bit to
"0".
Address
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Item
SCL clock frequency
Tolerance spike time on bus
Start condition set-up time
Start condition Hold time
SCL "L" time
SCL "H" time
SCL and SDA rise time
SCL and SDA fall time
Date set-up time
Date hold time
Stop condition set-up time
Bus free time
Fout Duty
Symbol
f
SCL
t
SP
t
SU
;
STA
t
HD
;
STA
t
LOW
t
HIGH
tr
tf
t
SU
;
DAT
t
HD
;
DAT
t
SU
;
STO
t
BUF
t
w
/t
Min.
-
0.6
1.3
0.6
-
100
0
0.6
1.3
45
Max.
400
50
0.3
55
Unit
kHz
ns
s
ns
s
%
Register symbol
SEC
MIN
HOUR
WEEK
DAY
MONTH
YEAR
RAM
MIN Alarm
HOUR Alarm
WEEK Alarm
DAY Alarm
Timer Counter 0
Timer Counter 1
Extension Register
Flag Register
Control Register
bit 7
o
o
o
o
o
o
80
AE
AE
AE
128
TEST
o
o
bit 6
40
40
o
6
o
o
40
40
6
64
WADA
o
o
bit 5
20
20
20
5
20
o
20
20
20
5
20
32
USEL
UF
UIE
bit 4
10
10
10
4
10
10
10
10
10
4
10
16
TE
TF
TIE
bit 3
8
8
8
3
8
8
8
8
8
3
8
8
2048
o
AF
AIE
bit 2
4
4
4
2
4
4
4
4
4
2
4
4
1024
o
o
o
bit 1
2
2
2
1
2
2
2
2
2
1
2
2
512
TSEL1
VLF
STOP
bit 0
1
1
1
0
1
1
1
1
1
0
1
1
256
TSEL0
o
RESET
Real time clock module
88
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