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CM8500A
3A B
US
T
ERMINATOR
GENERAL DESCRIPTION
FEATURES
Patent Filed #6,452,366
16 pin PTSSOP and PSOP package
Source and sink up to 3A, no heat sink required
Peak Current to 6A
Integrated Power MOSFETs
Output voltage can be programmed by external resistors
Separate voltages for VCCQ and PVDD
V OUT of 3% or less at 3A
Minimum external components
Shutdown for standby or suspend mode operation
Thermal shutdown protection
6A Low Noise Current Limit Protection
External Soft Start
Rail to Rail output Buck Converter
The CM8500A is a switching regulator designed to provide a
desired output voltage or termination voltage for various
applications by converting voltage supplies ranging from 2.0V
to 5.0V. The CM8500A can be implemented to produce
regulated output voltages in two different modes. In the
default mode, when the VIN/2 pin is open, the output voltage
is 50% of the VCCQ. The CM8500A can also be used to
produce various user-defined voltages by forcing a voltage on
the VIN/2 pin. In this case, the output voltage follows the
VIN/2 pin input voltage. The switching regulator is capable of
sourcing or sinking up to 3A of current while regulating an
output V
TT
voltage to within 3% or less.
The CM8500A, used in conjunction with series termination
resistors, provides an excellent voltage source for active
termination schemes of high speed transmission lines as
those seen in high speed memory buses and distributed
backplane designs.
The voltage output of the regulator can be used as a
termination voltage for other bus interface standards such as
SSTL, CMOS, Rambus TM ,GTL+, VME, LV-CMOS, LV-TTL,
and PECL.
APPLICATIONS
Mother Board
PCI / AGP Graphics
Game / Play Station
Set Top Box
IPC
SCSI-III Bus terminator
Buck Converter
PIN CONFIGURATION
PSOP-16 (PS16)/PTSSOP-16 (PT16)
Top View
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC1
PVDD1
VL1
PGND1
AGND
SD
VIN/2
AGSEN
VCC2
PVDD2
VL2
PGND2
AGND
VFB
VCCQ
AGND
2004/12/20 Champion Microelectronic Corporation
Page 1
CM8500A
3A B
US
T
ERMINATOR
PIN DESCRIPTION
Operating Rating
Pin No.
Symbol
Description
Min.
Typ. Max. Unit
1,16
VCC1,VCC2
Voltage supply for internal circuits
2
2.5
5
V
2,15
PVDD1,PVDD2
Voltage supply for output power transistors
2
2.5
5
V
3,14 VL1,VL2
Output voltage/inductor connection (IDD1+IDD2,
Output RMS current)
-3 3 A
4,13
PGND1,PGND2
Ground for output power transistors
5,9,12
AGND
Ground for internal reference voltage divider
8
AGSEN
Ground for remote sensing
6
SD
Shutdown active high. CMOS input level
0.75 X
VCC
VCC
+
0.3V
V
7
VIN/2
Input for external reference voltage
0
VIN
V
10 VCCQ
Voltage reference for external voltage divider
5
V
11
VFB
Feedback node for the V
TT
5 V
BLOCK DIAGRAM
2
PVDD1
14 VL2
10
VCCQ
S
R
Q
Q
13
PGND2
6
SD
+
-
RAMP AMP
COMPARATOR
20PF
12
AGND
OSCILLATOR/
RAMP GENERATOR
100K
16
VCC2
7
VIN/2
100K
+
-
11
VFB
15
PVDD2
9
AGND
8
AGND
3
VL1
1
VCC1
5
AGND
4
PGND1
ERROR AMP
ORDERING INFORMATION
Part Number
Temperature Range
Package
CM8500AIT
-40 to 85
16-Pin PTSSOP (PT16)
CM8500AIS
-40 to 85
16-Pin PSOP (PS16)
CM8500AGIT*
-40 to 85
16-Pin PTSSOP (PT16)
CM8500AGIS*
-40 to 85
16-Pin PSOP (PS16)
CM8500ATEVAL
Evaluation Board (T16)
*Note: G : Suffix for Pb Free Product
2004/12/20 Champion Microelectronic Corporation
Page 2
CM8500A
3A B
US
T
ERMINATOR
ABSOLUTE MAXIMUM RATINGS
Junction Temperature ........................... ............150C
Absolute maximum ratings are those values beyond which the
device could be permanently damaged.
Storage Temperature ............................. -65C to 125C
PVDD/VCC/VCCQ ................................................-0.3V to 6.0V
Lead Temperature (Soldering, 5 sec).................... 260C
Voltage on Any Other Pin ............ GND 0.3V to VCC + 0.3V
Thermal Resistance(
JA
)..... ....................... .40C/W
Output RMS Current, Source or Sink ...............................3.0A
OPERATING CONDITIONS
Temperature Range ............................. -40C to 85C
P
VDD
Operating Range .........................2.0V to 5.0V
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, these specifications apply T
A
=25
C
;
VCC=+3.3V and PVDD=+3.3V)
maximum ratings are stress ratings only and functional device operation is not implied.(Note 1)
CM8500A
Symbol Parameter Test
Conditions
Min. Typ. Max.
Unit
SWITCHING REGULATOR
VCCQ = 2.3V
1.12
1.15
1.18
V
VCCQ = 2.5V
1.22
1.25
1.28
V
IOUT = 0,
V
IN
/2 =
open
Note 2
VCCQ = 2.7V
1.32
1.35
1.38
V
VCCQ = 2.3V
1.09
1.15
1.21
V
VCCQ = 2.5V
1.19
1.25
1.31
V
VL
Output Voltage, SSTL_2
IOUT =
3A,
V
IN
/2 =
open
Note 3
VCCQ = 2.7V
1.28
1.35
1.42
V
VCCQ = 2.3V
1.139
1.15
1.162
V
VCCQ = 2.5V
1.238
1.25
1.263
V
V
IN
/2
Internal Resistor Divider
IOUT = 0
Note 2
VCCQ = 2.7V
1.337
1.35
1.364
V
Z
IN
V
IN
/2 Reference Pin Input Impedance
Note 2
VCCQ
= 0
50
K
fsw Switching
Frequency
CM8500A
510
600
690
KHz
I
OUT(RMS)
Maximum Output RMS Current
CM8500A
3
A
I
OUT(PEAK)
Maximum Output Peak Current
CM8500A
6
A
I
limit
Current limit
CM8500A
6
A
MOSFETs
RDS
(ON)
Drain to Source on-State Resistance PVDD=5V
150
180
m
SUPPLY
I
VCCA
Quiescent Current
VFB = 1.4V
LC unconnected
200 A
I
PVDD
VFB = 1.4V
LC unconnected
500 A
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions
Note 2:
VCC, PVDD = 3.3V 10%
Note 3:
It's not 100% test
2004/12/20 Champion Microelectronic Corporation
Page 3
CM8500A
3A B
US
T
ERMINATOR
FUNCTIONAL DESCRIPTION
The CM8500A is a switching regulator that is capable of
sinking and sourcing 3A of current without an external heat
sink. CM8500A uses a standard surface mount PTSSOP
and PSOP package with bottom metal exposed and the heat
can be piped through the bottom of the device and onto the
PCB.
The CM8500A integrates power MOSFETs that are capable
of source and sink 3A of current while maintaining excellent
voltage regulation. The output voltage can be regulated within
3% or less by using the external feedback. Separate voltage
supply inputs have been added to fit applications with various
power supplies for the databus and power buses.
VREF
The reference voltage could be ranged from 0V to VIN.
OUPUTS
The output voltage pins (VL1, VL2) are tied to the databus,
address, or clock lines via an external inductor. Output voltage
is determined by the VCCQ or VIN/2 inputs so it can be from
0V to VIN..
Internal Power Switches:
CM3708A has been integrated 2 Power MOSFETs whose
RDS
(ON)
is around 100m Ohm each.
Low Noise Current Limit:
CM3708A's current limit is a low noise current limit. It increase
the system loop noise immunity while it is doing the current limit
protection for the system. The current limit is around 6A for the
normal 3A operation.
INPUTS
The input voltage pins (VCCQ or VIN/2) determine the output
voltages (VL1 or VL2). In the default mode, when the VIN/2 pin
is open, the output voltage is 50% of the VCCQ input.
If a specific voltage is forced at the VIN/2 pin, the output voltage
follows the voltage at the VIN/2 pin. VCCQ suggested
connecting to VCCQ of memory module for better tracking with
memory VCCQ.
OTHER SUPPLY VOLTAGES
Several inputs are provided for the supply voltages: PVDD1,
PVDD2, VCC1, and VCC2.
The PVDD1 and PVDD2 provide the power supply to the power
MOSFETs. VCC1 and VCC2 provide the voltage supply to the
logic section and internal error amplifiers.
FEEDBACK
The VFB pin is an input that can be used for closed loop
compensation. This input is derived from the voltage output.
AGSEN pin is a contact node of internal resistor divider for
remote sense.
APPLICATIONS
USING THE CM8500A FOR SSTL BUS
TERMINATION
Figure 1 is the typical schematic of the CM8500ATEVAL that
shows the recommended approach for bus terminating
solutions for SSTL-2 bus. This circuit can be used in PC
memory and Graphics memory applications as shown in
Figure 2 and Figure 3.
Figure 4 shows the PCB layout of the CM8500ATEVAL.
Table 1details the key parameters of SSTL_2 specification.
Figure 5 shows two different approach of SSTL_2 Terminated
Output. (Refer to page 8 for detail description.)
2004/12/20 Champion Microelectronic Corporation
Page 4
CM8500A
3A B
US
T
ERMINATOR
APPLICATION CIRCUIT
R3 200k
2
1
VDD
pin3:connect to external voltage (-)
C2
104
J1
VTT
1
2
C4
104
J2
DC-INPUT
1
2
When external voltage applied ,pin1,2 should be open
C12
100uf/6.3V
C8
102
J3
Vref-OUT
1
2
Vtt=1/2 external voltage
R6,R7(option circuit)forVttVOLTAGEADJUST
and pin2:connect to external voltage (+)
TP1
BNC
1
2
3
4
5
VCC
NOTE:
J4ON/OFF
J3:referance output provided from Vtt
C14
100uf/6.3V
R1
5R1
L1
3.3uH
C7
820uf/6.3V
R8
100
C3
104
C11
100uf/6.3V
open:off(into shutdown mode)
VDD
VCC
J5
IN/EXT
2
1
3
R4
1k
2
1
C10
10uf/6.3V
C1
104
J6:reference output provided from shunt regulator
VDD
C16
470uf/6.3V
C13
104
C15
10uf/6.3V
C9
100uf/6.3V
R5
100k
2
1
U1 CM8500A
2
1
3
13
14
15
16
4
5
6
7
8
9
10
11
12
VDD1
VCC1
VL1
PGND2
VL2
VDD2
VCC2
PGND1
AGND1
SD
2/VCC
G-sense AGND3
VCCQ
FB
AGND4
J5:pin1 ,pin2 short:Vtt = 1/2Vcc
D5
SK12
R6
10k
2
1
J4:short :Demo kit on .
C6
102
D6
SK12
C5
104
R7
10k
2
1
Vtt=(Vcc*R6)/R6+R7
Figure 1. CM8500A Typical Application
(Schematic of CM8500ATEVAL)
2004/12/20 Champion Microelectronic Corporation
Page 5
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