CMI9761A/9761A+ DataSheet
2004/02/09, Rev 1.2
C-Media CMI9761A / 9761A+
6 Channel AC'97 2.3 Audio Codec
DataSheet, Revision 1.2
Feb. 9, 2004
C-Media Electronics, Inc.
6F, 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106, R.O.C.
TEL: 886-2-8773-1100
FAX: 886-2-8773-2211
http://www.cmedia.com.tw
For detailed product information, please contact
sales@cmedia.com.tw
CMI9761A/9761A+ DataSheet
2004/02/09, Rev 1.2
NOTICES
THIS DOCUMENT IS PROVIDED "AS IS" WITH NO WARRANTIES
WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY,
NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY
WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, DOCUMENT
OR SAMPLE.
ALL RIGHTS RESERVED. NO PART OF THIS DOCUMENT MAY BE
REPRODUCED OR TRANSMITTED IN ANY FORM OR BY ANY MEANS,
ELECTRONIC OR MECHANICAL, INCLUDING INFORMATION STORAGE
AND RETRIEVAL SYSTEMS, WITHOUT PERMISSION IN WRITING FROM
THE C-MEDIA ELECTRONICS, INC.
Third-party brands and names are the property of their respective owners.
Copyright 2003-2004 C-Media Electronics Inc.
CMI9761A/9761A+ DataSheet
2004/02/09, Rev 1.2
Copyright 2003-2004 C-Media Electronics Inc.
Page
1
Contents
0. Revision
History ....................................................................................................3
1. Product
Summary...................................................................................................3
2. Features..................................................................................................................4
3. Overview................................................................................................................6
4. Pin
Assignment ......................................................................................................8
5. Pin / Signal Descriptions........................................................................................9
5.1
Power / Ground..........................................................................................9
5.2
AC-Link / Clocking ...................................................................................9
5.3 Digital
I/O ................................................................................................10
5.4 Analog
I/O ...............................................................................................10
5.5
Filter / Reference......................................................................................11
5.6 Configuration ...........................................................................................11
6. Jack Detection and Configuration Information....................................................12
6.1
Resistors Network Method ......................................................................12
6.2 Configuration
Diagram ............................................................................13
7. DC
Characteristics ...............................................................................................14
8. AC-Link
Timing
Characteristics..........................................................................15
8.1 Cold
Reset
Timing ...................................................................................15
8.2 Warm
Reset
Timing .................................................................................15
8.3 AC-Link
Clocks .......................................................................................16
8.4
Data Output and Input Timing .................................................................17
8.5
Signal Rise and Fall Timing.....................................................................18
8.6
AC-Link Low Power Mode Timing.........................................................19
8.7 ATE
Test
Mode ........................................................................................19
9. Analog Performance Characteristics....................................................................20
10. Package
Dimension..........................................................................................21
CMI9761A/9761A+ DataSheet
2004/02/09, Rev 1.2
Copyright 2003-2004 C-Media Electronics Inc.
Page
2
List of Figures
Figure 1.
Pin Assignment ..........................................................................................8
Figure 2.
Resistors Network Method for Jack Detection ........................................12
Figure 3.
Recommended Configuration Diagram ...................................................13
Figure 4.
Cold Reset Timing Diagram ....................................................................15
Figure 5.
Warm Reset Timing Diagram ..................................................................15
Figure 6.
BIT_CLK and SYNC Timing Diagram ...................................................16
Figure 7.
Data Output and Input Timing Diagram ..................................................17
Figure 8.
Signal Rise and Fall Timing Diagram......................................................18
Figure 9.
AC-Link Low Power Mode Timing Diagram..........................................19
Figure 10.
ATE Test Mode Timing Diagram.........................................................19
Figure 11.
Mechanical Dimension ........................................................................21
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