CO4011A-FL
Single Chip CANopen Controller for Remote I/O
frenzel + berg elektronik Maximilianstr. 28 89231 Neu-Ulm Germany - phone +49(0)731/970 570 - fax +49(0)731/970 5739
www.frenzel-berg.de
Page 1 of 1
Revision 1.39
May/19/2003
General Description
The CO4011 is a low cost, high performance Single
Chip solution for CANopen remote I/O modules and
especially designed for automotive and industrial
applications. The device offers the complex
implementation of the CANopen standards DS301
and DS401 in a single chip. It is suitable for simple
low cost applications like sensor interfacing as well
as for complex I/O systems.
CO4011 provides up to 32 digital I/O lines, 0, 4 or 8
channels may be set for analog input operation with
a resolution of 8 or 10 bit. To support output overload
monitoring, a special error interrupt input is provided.
All usual baud rates up to 1 MBit are supported.
The CO4011 Chip requires only few external compo-
nents, just like a crystal, a CAN transceiver and
capacitors. To minimize external interface
recommendations all output pins have high current
drive capability of 4 mA. For interfacing optoisolators
no external drivers are required.
CO4011 is a software solution to run on Fujitsu
MB90F497 micro controller. It is offered either as
software runtime licence or as ready programmed
chip (runtime licence included).
Features
Single Chip CANopen Controller
According to CiA Draft Standards DS301
Version 4.0 and DS401 Version 2.0
Baudrate up to 1MBit
Various I/O configurations
Internal noise filtering for all inputs with
individual setting for each channel
Error interrupt input for output overload
monitoring
Output drivers with 4mA
Watchdog output
Temperature ranges up to 40 to 105
o
C
Package QFP64
Applications
The CO4011 CANopen Controller is optimised for
automotive and industrial applications such as:
Remote I/O Modules for CANopen
CANopen Interface for keyboards and
control panels
Low Cost CANopen Interface for sensors like
photoelectric reflex switches
photo interrupters
Low Cost CANopen Interface for actors like
pneumatic valves, warning panels etc.
CANopen Features
2 Transmit- and 1 Receive PDOs
Dynamic PDO mapping
Variable PDO identifier
All CANopen specific PDO transmission
types supported:
synchronous, asynchronous, event driven,
cyclic, acyclic and remote frame dependent.
Additional manufacturer specific trans-
mission mode for CAN-EASY applications.
Event timer and inhibit timer features for all
transmit PDOs.
Storing and restoring of object dictionary to
non-volatile memory
Nodeguarding
Lifeguarding
Heartbeat
Variable SYNC identifier
Emergency messages
Minimum boot up
Ordering Information
CO4011 Chip (programmed, licence included)
Part
Temp. Range
Package
CO4011A-FL
-40
o
C to 85
o
C
QFP64
CO4011AE-FL
-40
o
C to 105
o
C
QFP64
Software licence
Part
Description
CO4011SRL-F
Software runtime licence for
Fujitsu MB90F497 controller
CO4011A-FL
Single Chip CANopen Controller for Remote I/O
frenzel + berg elektronik Maximilianstr. 28 89231 Neu-Ulm Germany - phone +49(0)731/970 570 - fax +49(0)731/970 5739
www.frenzel-berg.de
Page 2 of 2
Revision 1.39
May/19/2003
Pin Assignment
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
I
N
9
/
R
P
D
I
I
N
8
/
W
U
I
I
I
N
7
I
N
6
I
N
5
I
N
4
I
N
3
I
N
2
I
N
1
I
N
0
A
V
C
C
A
V
R
E
F
A
V
S
S
C
F
G
0
V
S
S
T
E
S
T
BD0
ID6
ID5
ID4
ID3
ID2
ID1
ID0
VSS
X1
X0
VSS
VCC
RES#
VCC
CFG1
I
O
1
I
O
0
O
U
T
1
1
O
U
T
1
0
O
U
T
9
O
U
T
8
O
U
T
7
O
U
T
6
O
U
T
5
O
U
T
4
O
U
T
3
O
U
T
2
O
U
T
1
O
U
T
0
B
D
2
B
D
1
VSS
IO2
IO3
IO4
IO5
IO6
IO7
VCC
CF
CFG3/WD
CFG2
OLIRQ#
IN11
IN10
CANTX
CANRX
Pin Listing
Pin No.
Pin Name
Funktion
1 to 2
IN9 to IN8
Digital input active low
IN8 additional feature:
Wake Up Interrupt Input
IN9 additional feature:
Reset Power Down Input
3 to 10
IN7 to IN0
Analog or digital input
according to setting of
CFG0 .. CFG3 active low
11
AVCC
Supply for A/D-Converter
12
AVREF
Reference Voltage for A/D-
Converter
13
AVSS
Ground for A/D-Converter
14, 17, 59 CFG0 to
CFG2
Configuration bits 0 to 2 for
I/O setting / LED output
58
CFG3
Enable additional CAN
features input
and watchdog output
16
TEST
Do not connect this pin
19
RES#
Reset input active low
22
X0
Crystal oscillator input
23
X1
Crystal oscillator output
Pin Listing continued
Pin No.
Pin Name
Funktion
25*, 26*,
27 to 31
ID0*, ID1*
ID2 to ID6
Identifier selection input
32 to 34
BD0 to
BD2
Baud rate selection input
35 to 46
OUT0 to
OUT11
Digital output active low
47, 48, 50
to 55
IO0 to IO7 Digital input or output
according to configuration
setting. Active low
57
CF
Filter capacitor
60*
OLIRQ# *
Output overload interrupt
input active low
61, 62*
IN11, IN10* Digital input
63
CANTX
Transmitter output of CAN
module
64
CANRX
Receiver input of CAN
module
15, 21*,
24, 49
VSS
Ground
18*, 20,
56
VCC
Power supply
* Pins may be used for in circuit programming. See
"in circuit programming manual" for further
information
Handling the Device
Preventing latch up
The CO4011 is a CMOS device and may suffer latch
up under the following conditions:
1) A voltage higher than VCC or lower than VSS
is applied to any pin.
2) Absolute maximum ratings are exceeded
3) AVCC power is provided before VCC supply
Handling unused Pins
Do not leave unused input pins open. This might
cause malfunction of the device.
Power Supply Pins
Make sure that all ground and power supply pins are
connected to the same potential. Do not leave any
ground or power pins open. Connect at least two
ceramic capacitors of 100 nF and a tantalium
capacitor of 1 uF between VCC and VSS as close as
possible to the device.
CO4011A-FL
Single Chip CANopen Controller for Remote I/O
frenzel + berg elektronik Maximilianstr. 28 89231 Neu-Ulm Germany - phone +49(0)731/970 570 - fax +49(0)731/970 5739
www.frenzel-berg.de
Page 3 of 3
Revision 1.39
May/19/2003
Power Supply for A/D converter
The power supply for the A/D converter must not be
turned on before the power supply VCC.
If the A/D converter is not used, connect the pins as
follows: AVCC = AVREF = VCC, AVSS = VSS.
Input / output pins
All input and output pins for digital signals are active
low. This means for input pins, that inverted pin level
is mapped to PDO. For output pins the inverted byte
value from received PDO is written to the ouput pins.
Additional inverting capabilities are supported.
Pull up/down resistors
The CO4011 does not support internal pull up/down
resistors. Use external components where needed.
Pin Description
All input / output pins are high impedance during
reset. The CO4011 does not support internal pull
up/down resistors. Use external components where
needed. All input pins have Schmitt trigger
characteristics. See chapter "Typical Applications"
for additional information.
IN0 to IN11: Digital or analog input pins
The function of IN0 to IN7 depends on setting of
configuration bits CFG0 to CFG2. See also chapter
"Mapping I/O to Object Dictionary" for details.
Note: Digital input pins are active low. This
means that digital input pins are mapped with
inverted values to transmit PDO data.
All digital inputs use internal Schmitt trigger circuits.
The CO4011 provides optional input inverters and
internal noise filtering for all inputs with individual
setting for each channel. See chapter "Object
Dictionary" for details.
OUT0 to OUT12: Digital output pins
All output pins have high current drive capabilities of
approximate 4 mA for direct interfacing for
optocouplers without additional drivers.
Note: Digital output pins are active low. This
means that received output data from PDO is
written with inverted values to output pins.
The CO4011 provides optional output inverters with
individual setting for each channel. See chapter
"Object Dictionary" for details.
IO0 to IO7: Digital input or output pins
The function of IO0 to IO7 depends on the settiong
of CFG2. See also chapters "Device Configuration"
and "Mapping I/O to Object Dictionary" for details.
For IOx the description of INx or OUTx is valid,
dependant to CFG2 setting.
CF: Filter Capacitor input
For correct operation of the CO4011 a ceramic
capacitor of 100 nF or 220 nF must be connected
between Pin 57 (CF) and VSS. Place this component
as close as possible to the CO4011.
X0, X1: Crystal oscillator input
Connect a crystal of 4 MHz between X0 and X1. Use
additional ceramic capacitors of 22 pF between X0
and X1 to VSS.
CO4011A-FL
Single Chip CANopen Controller for Remote I/O
frenzel + berg elektronik Maximilianstr. 28 89231 Neu-Ulm Germany - phone +49(0)731/970 570 - fax +49(0)731/970 5739
www.frenzel-berg.de
Page 4 of 4
Revision 1.39
May/19/2003
TEST: Reserved pin
Leave pin TEST unconnected.
OLIRQ#: Output Overload Interrupt
This active low input pin is provided to support output
overload monitoring. Connect output from output
overload control circuit to this input pin. If the
CO4011 scans a low level on pin OLIRQ#, the
device automatic enters the error state given in
Object 67FE.02 (default enter preoperational state).
Further more the Error Register (index 1001) is set to
0x03, indicating a current error.
Last but not least the device will send an emergency
telegram with error code 0x2310 indicating an
overload error.
If output overload monitoring is not to be used in
your application, make sure, that pin OLIRQ# is
forced to logic high level.
VCC, AVCC, VSS, AVSS: Power Supply Pins
Make sure that all ground and power supply pins are
connected to the same potential. Do not leave any
ground or power supply pins open. Connect
decoupling capacitors as close as possible to the
device. See chapter "Recommended Operation
Conditions" for details
RES#: Reset input pin
For a correct device reset, provide an active low
reset signal according to recommended operation
conditions to input RES#.
CFG0 to CFG2: Configuration input pins / LED
output pins
Set device configuration to preferred operation mode
using CFG0 to CFG3. Leaving any configuration
input unconnected may cause malfunction of the
device. It is strongly recommended forcing all con-
figuration input bits to either high or low level by
using external pull up/down resistors. Do not use
direct connection to VCC or VSS.
LED-Functions (active low):
CFG0 Chip-Status LED shows the Chip status
Always blinking:
10 % Duty cycle indicates no error
90 % Duty cycle indicates error
CFG1 CANopen RUN LED shows NMT state
according to DRP303-3
CFG2 CANopen Error LED shows Error state
according to DRP303-3
Note: CFGx are input pins during start up and output
pins in normal operation mode. In order to prevent
short circuit overload a series resistor between CFGx
and configuration device (example DIP switch)
should be used. See also "typical application" for
details.
CFG3/WD: Configuration input / watchdog output
CFG3/WD is scanned during reset to switch the
CO4011 to enable additional CAN features. Then
CFG3/WD is switched to output and drives the
watchdog trigger. To monitor correct device
operation, this feature may be used in combination
with an external watchdog timer.
Note: CFGx are input pins during start up and output
pins in normal operation mode. In order to prevent
short circuit overload a series resistor between CFGx
and configuration device (example DIP switch)
should be used. See also "typical application" for
details.
CANRX, CANTX: CAN interface pins
The CAN interface pins may be used for direct
connection to CAN transceivers like the 80C251. For
longer bus length or noisy or disturbed environments
it is strongly recommended to use galvanic isolation
with optocouplers between bus interface and
CANopen application, to improve system reliability.
CO4011A-FL
Single Chip CANopen Controller for Remote I/O
frenzel + berg elektronik Maximilianstr. 28 89231 Neu-Ulm Germany - phone +49(0)731/970 570 - fax +49(0)731/970 5739
www.frenzel-berg.de
Page 5 of 5
Revision 1.39
May/19/2003
In Circuit programming of MB90F497
If you want to enable in circuit programming of the
Fujitsu MB90F497 micro controller for CO4011
software download or update, the following
conditions must be met.
CO4011
VSS
21
VSS
VSS
VCC
18
VCC
VCC
RXD
ID0
25
ID0
ID1
26
ID1
OVL#
60
OVL#
IN10
62
IN10
Programming
TXD / RXD whith
TTL-Level (0-5V)
Normal operation
Pin
No.
Pin
Name
Pin Setting for in circuit
programming
21
VSS Level = High
18
VCC Level = Low
25
ID0
Level = Low
26
ID1
Level = Low
60
OVL# RXD (TTL logic level)
62
IN10 TXD (TTL logic level)
Design example for programming adaptor.
CO4011
Application with Co4011
RS232 adapter with a Cable and
a D-Sub-Connector to PC (Com X)
MAX232
D-Sub 9
VSS
21
VCC
VCC
VCC
VCC
VCC
18
ID0
Jy
Jx
1k
1k
4k7
4k7
25
2
3
8
7
6
4
5
ID1
26
OVL#
OVL#
RXD (TTL)
TXD (TTL)
60
IN10
IN10
62
To enable the programming condition chose an
identifier that forces the Pins ID0 and ID1 to low
level. For example identifiers ID= 3, 7, 0x0B, 0x0F ...
might be used. Close the jumpers Jx and Jy.
For optimised programming adapter design, the
programming adapter should close the jumpers Jx
and Jy directly by plugging the adaptor into the
application board.
For normal operation mode the programming
adapter must be removed.
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