www.docs.chipfind.ru
Preliminary Rev. 0.2 9/05
Copyright 2005 by Silicon Laboratories
CP2103
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
CP2103
S
I N G L E
-C
H I P
USB
T O
UART B
R I D G E
Single-Chip USB to UART Data Transfer
Integrated USB transceiver; no external resistors
required
Integrated clock; no external crystal required
Integrated 1024-Byte EEPROM for vendor ID, product
ID, serial number, power descriptor, release number,
and product description strings
On-chip power-on reset circuit
On-chip voltage regulator: 3.3 V output
USB Function Controller
USB Specification 2.0 compliant; full-speed (12 Mbps)
USB suspend states supported via SUSPEND pins
Asynchronous Serial Data BUS (UART)
All handshaking and modem interface signals
Data formats supported:
- Data bits: 5, 6, 7, and 8
- Stop bits: 1, 1.5, and 2
- Parity: odd, even, mark, space, no parity
Baud rates: 300 bps to 1 Mbits
576 Byte receive buffer; 640 byte transmit buffer
Hardware or X-On/X-Off handshaking supported
Four GPIO signals for status and control
Configurable I/O (1.8 V to V
DD
) using V
IO
pin
Configurable I/O (V
DD
to 5 V) using external pull-up
RS-485 mode with bus transceiver control
Virtual COM Port Device Drivers
Works with existing COM Port PC applications
Royalty-free distribution license
Windows
98 SE/2000/XP
MAC OS-9
MAC OS-X
Linux 2.40
USBXpressTM Direct Driver Support
Example Applications
Upgrade of RS-232 legacy devices to USB
Upgrade of RS-485 legacy devices to USB
Cellular phone USB interface cable
PDA USB interface cable
USB to RS-232 serial adapter
Supply Voltage
Self-powered: 3.0 to 3.6 V
USB bus powered: 4.0 to 5.25 V
I/O voltage: 1.8 V to V
DD
Package
Lead free 28-pin QFN (5 x 5 mm)
Ordering Part Number
CP2103-GM
Temperature Range: 40 to +85 C
Figure 1. Example System Diagram
CP2103
3.3 V
Voltage
Regulator
48 MHz
Oscillator
IN
OUT
SUSPEND
SUSPEND
11
12
REGIN
7
GND
2
RST
9
D+
D-
4
8
UART
RI
DCD
CTS
RTS
RXD
TXD
DSR
DTR
1
28
27
26
25
24
23
22
2
3 3
External RS-232
transceiver or
UART circuitry
(to external circuitry
for USB suspend
states)
VBUS
D-
D+
GND
4
5
6
USB
CONNECTOR
6
1
VDD
VBUS
USB Function
Controller
USB
Transceiver
640B
TX
Buffer
576B
RX
Buffer
1024B
EEPROM
GPIO_0
GPIO_1
GPIO_3
GPIO_2
18
17
16
(to external circuitry
for status and
control)
4
VIO
5
External
voltage supply
or direct
connection
to VDD
19
CP2103
2
Preliminary Rev. 0.2
CP2103
Preliminary Rev. 0.2
3
T
A B L E
O F
C
O N T E N TS
Section
Page
1. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3. Global DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
4. Pinout and Package Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5. USB Function Controller and Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
6. Asynchronous Serial Data Bus (UART) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
7. GPIO Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
8. Internal EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
9. Virtual Com Port Device Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
10. USBXpressTM Direct Driver Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
11. Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
CP2103
4
Preliminary Rev. 0.2
1. System Overview
The CP2103 is a highly-integrated USB-to-UART Bridge Controller providing a simple solution for updating
RS-232/RS-485 designs to USB using a minimum of components and PCB space. The CP2103 includes a USB
2.0 full-speed function controller, USB transceiver, oscillator, EEPROM, and asynchronous serial data bus (UART)
with full modem control signals in a compact 5 x 5 mm QFN-28 package (sometimes called "MLF" or "MLP"). No
other external USB components are required.
The on-chip EEPROM may be used to customize the USB Vendor ID, Product ID, Product Description String,
Power Descriptor, Device Release Number, and Device Serial Number as desired for OEM applications. The
EEPROM is programmed on-board via the USB allowing the programming step to be easily integrated into the
product manufacturing and testing process.
Royalty-free Virtual COM Port (VCP) device drivers provided by Silicon Laboratories allow a CP2103-based
product to appear as a COM port to PC applications. The CP2103 UART interface implements all RS-232/RS-485
signals, including control and handshaking signals, so existing system firmware does not need to be modified. The
device also features up to (4) GPIO signals that can be user-defined for status and control information. Support for
I/O interface voltages down to 1.8 V is provided via a V
IO
pin. In many existing RS-232 designs, all that is required
to update the design from RS-232 to USB is to replace the RS-232 level-translator with the CP2103. See
www.silabs.com for the latest application notes and product support information for CP2103.
An evaluation kit for the CP2103 (Part Number: CP2103EK) is available. It includes a CP2103-based USB-to-
UART/RS-232 evaluation board, a complete set of VCP device drivers, USB and RS-232 cables, and full
documentation. Contact a Silicon Labs' sales representatives or go to www.silabs.com to order the CP2103
Evaluation Kit.
CP2103
Preliminary Rev. 0.2
5
2. Absolute Maximum Ratings
3. Global DC Electrical Characteristics
Table 1. Absolute Maximum Ratings
Parameter
Conditions
Min
Typ
Max
Units
Ambient temperature under bias
55
--
125
C
Storage Temperature
65
--
150
C
Voltage on any I/O Pin or RST with respect to GND
0.3
--
5.8
V
Voltage on V
DD
or V
IO
with respect to GND
0.3
--
4.2
V
Maximum Total current through V
DD
, V
IO
, and GND
--
--
500
mA
Maximum output current sunk by RST or any I/O pin
--
--
100
mA
Note: Stresses above those listed may cause permanent damage to the device. This is a stress rating only, and functional
operation of the devices at or exceeding the conditions in the operation listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods may affect device reliability.
Table 2. Global DC Electrical Characteristics
V
DD
= 2.7 to 3.6 V, 40 to +85 C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Supply Voltage (V
DD
)
3.0
3.3
3.6
V
Supply Voltage (V
IO
)
1.8
3.3
V
DD
V
Supply Current
V
DD
= 3.3 V
--
26
--
mA
Supply Current in Suspend
V
DD
= 3.3 V
--
330
--
A
V
IO
Supply Current
VBUS = 0
V
DD
= 0
V
IO
= 3.0 V
--
500
--
A
Specified Operating Temperature Range
40
--
+85
C
CP2103
6
Preliminary Rev. 0.2
Table 3. UART and Suspend I/O DC Electrical Characteristics
V
IO
= V
DD
= 2.7 to 3.6 V, 40 to +85 C unless otherwise specified.
Parameters
Conditions
Min
Typ
Max
UNITS
Output High Voltage (V
OH
)
I
OH
= 10 A
I
OH
= 3 mA
I
OH
= 10 mA
V
IO
0.1
V
IO
0.7
--
--
--
V
IO
0.8
--
--
--
V
Output Low Voltage (V
OL
)
I
OL
= 8.5 mA
I
OL
= 10 A
--
--
--
--
0.6
0.1
V
Input High Voltage (V
IH
)
2.0
--
--
V
Input Low Voltage (V
IL
)
--
--
0.8
V
Input Leakage Current
weak pull-ups enabled
weak pull-ups disabled
--
--
25
--
50
1
A
Maximum Input Voltage
Open drain, logic high (1)
--
--
5.8
V
Table 4. UART and Suspend I/O DC Electrical Characteristics (Low-Voltage Operation)
V
IO
= 1.8 V to 2.7 V, 40 to +85 C unless otherwise specified.
Parameters
Conditions
Min
Typ
Max
UNITS
Output High Voltage (V
OH
)
I
OH
= TBD
I
OH
= TBD
I
OH
= TBD
TBD
TBD
--
--
--
TBD
--
--
--
V
Output Low Voltage (V
OL
)
I
OL
= TBD
I
OL
= TBD
--
--
--
--
TBD
TBD
V
Input High Voltage (V
IH
)
TBD
--
--
V
Input Low Voltage (V
IL
)
--
--
TBD
V
Input Leakage Current
TBD
--
TBD
TBD
A
Maximum Input Voltage
Open drain, logic high (1)
--
--
TBD
V
CP2103
Preliminary Rev. 0.2
7
4. Pinout and Package Definitions
Table 5. CP2103 Pin Definitions
Name
Pin #
Type
Description
V
DD
6
Power In
Power Out
3.03.6 V Power Supply Voltage Input.
3.3 V Voltage Regulator Output. See Section 11.
V
IO
5
Power In
1.8 V to V
DD
I/O Supply Voltage Input.
GND
2
Ground. Must be tied to ground.
SGND
Ground. Must be tied to ground.
RST
9
D I/O
Device Reset. Open-drain output of internal POR or V
DD
monitor. An
external source can initiate a system reset by driving this pin low for
at least 15 s.
REGIN
7
Power In
5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
VBUS
8
D In
VBUS Sense Input. This pin should be connected to the VBUS sig-
nal of a USB network. A 5 V signal on this pin indicates a USB net-
work connection.
D+
3
D I/O
USB D+
D
4
D I/O
USB D
TXD
25
D Out
Asynchronous data output (UART Transmit)
RXD
24
D In
Asynchronous data input (UART Receive)
CTS
22*
D In
Clear To Send control input (active low)
RTS
23*
D Out
Ready to Send control output (active low)
DSR
26*
D in
Data Set Ready control input (active low)
DTR
27*
D Out
Data Terminal Ready control output (active low)
DCD
28*
D In
Data Carrier Detect control input (active low)
RI
1*
D In
Ring Indicator control input (active low)
SUSPEND
12*
D Out
This pin is driven high when the CP2103 enters the USB suspend
state.
SUSPEND
11*
D Out
This pin is driven low when the CP2103 enters the USB suspend
state.
NC
10, 1315,
2021
These pins should be left unconnected or tied to V
DD
.
GPIO.3
16
D I/O
User-configurable input or output.
GPIO.2
17
D I/O
User-configurable input or output.
GPIO.1
18
D I/O
User-configurable input or output.
GPIO.0
19
D I/O
User-configurable input or output.
*Note: Pins can be left unconnected when not used.
CP2103
8
Preliminary Rev. 0.2
Figure 2. QFN-28 Pinout Diagram (Top View)
4
5
6
7
2
1
3
11
12
13
14
9
8
10
18
17
16
15
20
21
19
25
26
27
28
23
22
24
CP2103
Top View
RI
GND
D+
D-
V
DD
REGIN
VB
U
S
RS
T
NC
S
U
SP
END
S
U
SP
END
NC
NC
NC
GPIO.3
GPIO.2
GPIO.1
GPIO.0
NC
NC
CTS
RTS
RXD
TX
D
DSR
DTR
DC
D
SGND
SGND
V
IO
CP2103
Preliminary Rev. 0.2
9
Figure 3. QFN-28 Package Drawing
Table 6. QFN-28 Package
Dimensions
MM
MIN
TYP
MAX
A
0.80
0.90
1.00
A1
0
0.02
0.05
A2
0
0.65
1.00
A3
--
0.25
--
b
0.18
0.23
0.30
D
--
5.00
--
D2
2.90
3.15
3.35
E
--
5.00
--
E2
2.90
3.15
3.35
e
--
0.5
--
L
0.45
0.55
0.65
N
--
28
--
ND
--
7
--
NE
--
7
--
R
0.09
--
--
AA
--
0.435
--
BB
--
0.435
--
CC
--
0.18
--
DD
--
0.18
--
1
E
D
A2
A
A1
e
A3
E2
R
e
L
Bottom View
Side View
2
3
4
5
6
7
8
9
10
12
13
14
21
20
19
17
16
15
28
27
26
24
23
22
E2
25
2
D2
11
18
D2
2
6 x
e
6 x e
DETAIL 1
DETAIL 1
AA
BB
CC
DD
b
CP2103
10
Preliminary Rev. 0.2
Figure 4. Typical QFN-28 Landing Diagram
Optional
GND
Connection
b
L
0.50 mm
0.30 mm
0.10 mm
0.20 mm
0.85 mm
0.35 mm
e
E
D
0.50 m
m
0.
3
0
m
m
0.
1
0
mm
0.
2
0
m
m
0.85 mm
0.
3
5
mm
Top View
E2
D2
0.
2
0
m
m
0.20 mm
0.
5
0
m
m
0.50 mm
CP2103
Preliminary Rev. 0.2
11
Figure 5. Typical QFN-28 Solder Paste Diagram
b
L
0.50 mm
0.30 mm
0.10 mm
0.20 mm
0.85 mm
0.35 mm
e
E
D
0.5
0
m
m
0.3
0
mm
0.1
0
mm
0.2
0
mm
0.85 mm
0
.
35 mm
Top View
E2
D2
0.2
0
mm
0.20 mm
0.5
0
mm
0.50 mm
0.30 mm
0.20 mm
0.60 mm
0.40 mm
0.70 mm
0.60 mm
CP2103
12
Preliminary Rev. 0.2
5. USB Function Controller and Transceiver
The Universal Serial Bus function controller in the CP2103 is a USB 2.0 compliant full-speed device with integrated
transceiver and on-chip matching and pull-up resistors. The USB function controller manages all data transfers
between the USB and the UART as well as command requests generated by the USB host controller and
commands for controlling the function of the UART.
The USB Suspend and Resume signals are supported for power management of both the CP2103 device as well
as external circuitry. The CP2103 will enter Suspend mode when Suspend signaling is detected on the bus. On
entering Suspend mode, the CP2103 asserts the SUSPEND and SUSPEND signals. SUSPEND and SUSPEND
are also asserted after a CP2103 reset until device configuration during USB Enumeration is complete.
The CP2103 exits the Suspend mode when any of the following occur: (1) Resume signaling is detected or
generated, (2) a USB Reset signal is detected, or (3) a device reset occurs. On exit of Suspend mode, the
SUSPEND and SUSPEND signals are de-asserted.
Both SUSPEND and SUSPEND temporarily float high during a CP2103 reset. If this behavior is undesirable, a
strong pulldown (10 k
) can be used to ensure SUSPEND remains low during reset. See Figure 6 for other
recommended options.
Figure 6. Typical Connection Diagram
Option 1: A 4.7 k
pull-up resistor can be added to increase noise immunity.
Option 2: A 4.7 F tantalum capacitor can be added if powering other devices from the on-chip regulator.
Option 3: Avalanche transient voltage suppression diodes should be added for ESD protection.
Option 3:
Use Littlefuse p/n SP0503BAHT or equivalent.
Option 4: 10 k
resistor to ground to hold SUSPEND low on initial power on or device reset.
1
CP2103
SUSPEND
SUSPEND
11
12
REGIN
7
GND
2
RST
9
D+
3
D-
4
8
C2
0.1
F
C1
1
F
RI
DCD
CTS
RTS
RXD
TXD
DSR
DTR
1
28
27
26
25
24
23
22
2
3
External RS-232
transceiver or
UART circuitry
(to external circuitry
for USB suspend
states)
VBUS
D-
D+
GND
4
5
6
USB
CONNECTOR
6
VDD
VBUS
VDD
R1
4.7 k
D1
D2
D3
Option 1
R2
10 k
Option 4
Option 3
C4
4.7
F
TANT
Option 2
V
IO
5
1
F
I/O Voltage
GPIO.3
GPIO.2
GPIO.1
GPIO.0
19
18
17
16
External
Application
Circuitry
CP2103
Preliminary Rev. 0.2
13
6. Asynchronous Serial Data Bus (UART) Interface
The CP2103 UART interface consists of the TX (transmit) and RX (receive) data signals as well as the RTS, CTS,
DSR, DTR, DCD, and RI control signals. The UART supports RTS/CTS, DSR/DTR, and X-On/X-Off handshaking.
The UART is programmable to support a variety of data formats and baud rates. The data format and baud rate
programmed into the UART is set during COM port configuration on the PC. The data formats and baud rates
available are listed in Table 7.
7. GPIO Pins
The CP2103 supports (4) user-configurable GPIO pins for status and control information. More information
regarding the configuration and usage of these pins can be found in "AN144: CP210x Customization Guide" and
"AN223: Port Configuration and GPIO for CP210x" available on the Silicon Laboratories
website
.
8. Internal EEPROM
The CP2103 includes an internal EEPROM that may be used to customize the USB Vendor ID, Product ID,
Product Description String, Power Descriptor, Device Release Number, and Device Serial Number as desired for
OEM applications. Customization of the USB configuration data is optional. If the EEPROM is not programmed
with OEM data, the default configuration data shown in Table 8 is used. However, a unique serial number is
required for OEM applications in which it is possible for multiple CP2103-based devices to be connected to the
same PC.
The internal EEPROM is programmed via the USB. This allows the OEM's USB configuration data and serial
number to be written to the CP2103 on-board during the manufacturing and testing process. A stand-alone utility
for programming the internal EEPROM is available from Silicon Laboratories. A library of routines provided in the
form of a Windows
DLL is also available. This library can be used to integrate the EEPROM programming step
into custom software used by the OEM to streamline testing and serial number management during manufacturing.
The EEPROM has a typical endurance of 100,000 write cycles with a data retention of 100 years.
USB descriptors can be locked to prevent future modification.
Table 7. Data Formats and Baud Rates
Data Bits
5, 6, 7, and 8
Stop Bits
1, 1.5
1
, and 2
Parity Type
None, Even, Odd, Mark, Space
Baud Rates
2
300, 600, 1200, 1800, 2400, 4000, 4800, 7200, 9600, 14400, 16000, 19200,
28800, 38400, 51200, 56000, 57600, 64000, 76800, 115200, 128000,
153600, 230400, 250000, 256000, 460800, 500000, 576000, 921600
3
Notes:
1. 5-bit only.
2. Additional baud rates are supported. See "AN205: CP210x Baud Rate Support".
3. 7 or 8 data bits only.
CP2103
14
Preliminary Rev. 0.2
9. Virtual Com Port Device Drivers
The CP210x Virtual COM Port (VCP) device drivers allow a CP2103-based device to appear to the PC's
application software as an additional COM port (in addition to any existing hardware COM ports). Application
software running on the PC accesses the CP2103-based device as it would access a standard hardware COM
port. However, actual data transfer between the PC and the CP2103 device is performed over the USB. Therefore,
existing COM port applications may be used to transfer data via the USB to the CP2103-based device without
modifying the application. Contact Silicon Laboratories for the latest list of supported operating systems.
Note: Silicon Laboratories' VCP device drivers are required for device operation and are only distributed as part of the CP2103
Evaluation Kit (Part Number: CP2103EK). Contact any of Silicon Lab's sales representatives or go to www.silabs.com to
order the CP2103 Evaluation Kit. The CP210x drivers and programming utilities are subject to change without notice.
Subscription to the website "Auto Email Alert" system for automatic notification of updates and the use of the "Product
Update Registration" service is recommended.
10. USBXpress
TM
Direct Driver Support
The Silicon Laboratories USBXpressTM for CP210x Development Kit provides an alternate solution for interfacing
with CP2103 devices than using the Virtual COM port. No Serial Port protocol expertise is required. Instead, a
simple, high-level application program interface (API) is used to provide simpler CP2103 connectivity and
functionality.
The USBXpress for CP210x Development Kit includes Windows device drivers, Windows device driver installer
and uninstallers, and a host interface function library (host API) provided in the form of a Windows Dynamic Link
Library (DLL). The included device drivers and installation files support MS Windows 98SE/2000/XP.
11. Voltage Regulator
The CP2103 includes an on-chip 5 to 3 V voltage regulator. This allows the CP2103 to be configured as either a
USB bus-powered device or a USB self-powered device. These configurations are shown in Figure 7 and Figure 8.
When enabled, the 3 V voltage regulator output appears on the V
DD
pin and can be used to power external 3 V
devices. See Table 9 for the voltage regulator electrical characteristics.
Alternatively, if 3 V power is supplied to the V
DD
pin, the CP2103 can function as a USB self-powered device with
the voltage regulator disabled. For this configuration, it is recommended that the REGIN input be tied to the 3 V net
to disable the voltage regulator. This configuration is shown in Figure 9.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
application note "AN144: CP210x Customization Guide" for information on how to customize USB descriptors for
the CP2103.
Note: It is recommended that additional decoupling capacitance (e.g., 0.1 F in parallel with 1.0 F) be provided on the REGIN
input.
Table 8. Default USB Configuration Data
Name
Value
Vendor ID
10C4h
Product ID
EA60h
Power Descriptor (Attributes) 80h
Power Descriptor (Max.
Power)
32h
Release Number
0100h
Serial Number
0001 (63 characters maximum)
Product Description String
"CP2103 USB to UART Bridge Controller" (126 characters maximum)
CP2103
Preliminary Rev. 0.2
15
Figure 7. Configuration 1: USB Bus-Powered
Figure 8. Configuration 2: USB Self-Powered
Table 9. Voltage Regulator Electrical Specifications
40 to +85 C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Input Voltage Range
4.0
--
5.25
V
Output Voltage
Output Current = 1 to 100 mA*
3.0
3.3
3.6
V
VBUS Detection Input Threshold
1.0
1.8
4.0
V
Bias Current
--
110
--
A
*Note: The maximum regulator supply current is 100 mA.
Voltage Regulator (REG0)
5 V In
3 V Out
VBUS Sense
REGIN
VBUS
From VBUS
To 3 V
Power Net
Device
Power Net
V
DD
CP2103
Voltage Regulator (REG0)
5 V In
3 V Out
VBUS Sense
REGIN
VBUS
To 3V
Power Net
Device
Power Net
V
DD
CP2103
From 5 V
Power Net
From VBUS
CP2103
16
Preliminary Rev. 0.2
Figure 9. Configuration 3: USB Self-Powered, Regulator Bypassed
Voltage Regulator (REG0)
5 V In
3 V Out
VBUS Sense
REGIN
VBUS
From 3 V
Power Net
Device
Power Net
V
DD
CP2103
From VBUS
CP2103
Preliminary Rev. 0.2
17
Document Change List
Revision 0.1 to Revision 0.2
Updated "Linux 2.40" bullet on page 1.
CP2103
18
Preliminary Rev. 0.2
C
ONTACT
I
NFORMATION
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