DM9008
ISA/Plug & Play Super Ethernet Contoller
Final
1
Version :DM9008-DS-F02
June 14, 2000
General Description
The DM9008 Ethernet controller is a highly integrated design
that provides all Medial Access Control (MAC)
and Encode-Decode (ENDEC) functions in accordance with
the IEEE 802.3 standard. Network interfaces
include 10BASE5 or 10BASE2 Ethernet via the AUI
port and 10BASE-T via the Twisted-pair. The DM9008
Ethernet controller can interface directly to the PC-AT
ISA bus without any external device. The interface to
PC-AT ISA bus is fully compatible with NE2000 Ethernet
adapter cards, so all software programs designed for NE2000
can run on the DM9008 card without any modification.
Microsoft's Plug and Play and the jumperless software
configuration function are both supported. The capability of the
PnP and Non-PnP mode auto-switch function allows users to
configure network card. No jumpers or switches are needed to
set when using either the PC
or PnP function. The integrated 8Kx16 SRAM and 10BASE-T
transceiver make DM9008 more cost-effective.
Block Diagram
DM9008
ISA/Plug & Play Super Ethernet Contoller
2
Final
Version :DM9008-DS-F02
June 14, 2000
Features
Single chip solution for IEEE 802.3, 10BASE-T,
10BASE2 and 10BASE5
Integrated ISA interface, 8Kx16 SRAM, Media Access
Control, ENDEC and 10BASE-T transceiver
Supports ISA Plug and Play configuration
Software-compatible with NOVELL NE2000
Supports PnP and Non-PnP Auto-switching
PnP, Non-PnP and Auto-switch mode software
selectable
8 interrupt lines selectable
Auto-Polarity detection and correction
Selectable 8 and 16-bit slot mode
Provides auto-detection/auto-switching for 10BASE-T
Transceiver and Attachment Unit Interface (AUI)
External EEPROM programmable
Supports BOOT-ROM page mode
Loopback capability for diagnostics
Receiver and collision squelch circuit to reduce noise
Low-power CMOS process with single 5V power
supply
Built-in pre-distortion resisters for 10BASE-T
application
100-pin QFP package
Pin Configuration
DM9008
ISA/Plug & Play Super Ethernet Contoller
Final
3
Version :DM9008-DS-F02
June 14, 2000
Absolute Maximum Ratings*
Supply Voltage (VCC) . . . . . . . . . . . . . . . . -0.5V to +7.0V
DC Input Voltage (Vin) . . . . . . . . . . . -0.5V to VCC +0.5V
DC Output Voltage (Vout) . . . . . . . . . -0.5V to VCC +0.5V
Storage Temperature Range (Tstg) . . . -65
C to + 150
C
Power Dissipation (PD) . . . . . . . . . . . . . . . . . . . . 500 mW
Lead Temp. (TL) (Soldering, 10 sec.) . . . . . . . . . . 235
C
Case Temp. (Tc) . . . . . . . . . . . . . . . . . . . . . . 0
C to 85
C
ESD rating (Rzap = 1.5k, Czap = 120 pF) . . . . . . . 4000V
Differential Input Voltage . . . . . . . . . . . . . . . -5.5V to 16V
Differential Output Voltage . . . . . . . . . . . . . . . . 0V to 16V
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device. These
are stress ratings only. Functional operation of this device at
these or any other conditions above those indicated in the
operational sections of this specification is not implied or
intended. Exposure to the absolute maximum rating conditions
for extended periods may affect device reliability.
DC Electrical Characteristics
(VCC = 5V
5%, Tc= 0
C to 85
C, unless otherwise specified)
Symbol
Parameter
Min.
Max.
Unit
Conditions
Voh
High Level Output Voltage
(Notes 1, 2)
VCC - 0.1
3.5
V
V
Ioh = -20
A
Ioh = -2.0mA
Vol
Low Level Output Voltage
(Notes 1, 2)
0.1
0.4
V
V
Iol = 20
A
Iol = 2.0mA
Vih
High Level Input Voltage (Note 6)
3.0
V
Vil
Low Level Input Voltage (Note 6)
0.8
V
Iin
Input Current
-1.0
+1.0
A
Vi = VCC or GND
Ioz
Tri-state Output Leakage Current
-10
+10
A
Vout = VCC or GND
Icco
Operating VCC + AVCC Supply
Current (Note 3)
120
mA
X1 = 20 Mhz
Iout = 0
A
Iccs
Standby VCC + AVCC Supply
Current (Note 4)
110
mA
Vin = VCC or GND
Differential Pins (TX+/TX-, RX+/RX-, CD+/CD)
V
OD
Differential Output Voltage (TX
)
+550
+1200
mV
78 ohm termination and
270 ohms from each to GND
V
OB
Differential Output Voltage
Imbalance (TX
)
40
mV
78 ohm termination and
270 ohms from each to GND
V
U
Undershoot Voltage (TX
)
100
mV
78 ohm termination and
270 ohms from each to GND
DM9008
ISA/Plug & Play Super Ethernet Contoller
4
Final
Version :DM9008-DS-F02
June 14, 2000
DC Electrical Characteristics (continued)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDS
Differential Squelch Threshold (RX
and CD
)
-175
(Note 5)
-300
mV
VCM
Differential Input Common Mode
Voltage (RX
and CD
) (Note 5)
0
5.5
V
Twisted Pair Interface Pins (TPTX+/TPTX-)
Vtidf
TP input voltage
.350
2.0
V
-
Vil
Vih
LI:
low
high
-
2.4
0.8
-
V
V
-
-
Note 1: These levels are tested dynamically using a limited number of functional test patterns. Refer to AC Test Load.
Note 2: The low drive CMOS compatible Voh and Vol limits are not tested directly. Detailed device characterization verifies
that this specification can be guaranteed by testing the high drive TTL compatibl e Vol and Voh specifications.
Note 3: This measurement is made while the DM9008 is undergoing transmission, reception, and collision. The value is
not measured instantaneously, but is averaged over a span of several milliseconds.
Note 4: This measurement is made while the DM9008 is sitting idle of transmission. This measurement is described in note
1.
Note 5: This parameter is guaranteed by design and is not tested.
Note 6: Except RST, IORB, IOWB which are Schmitt trigger with Vil = 1.0V, Vih = 2.8V.
DM9008
ISA/Plug & Play Super Ethernet Contoller
Final
5
Version :DM9008-DS-F02
June 14, 2000
Pin Description
Pin No.
Symbol
I/O
Description
PC ISA BUS INTERFACE PINS
96 - 99
3 - 5
7
9
11 - 13
15 - 18
20, 22
SA0 - SA3
SA4 - SA6
SA7
SA8
SA9 - SA11
SA14 - SA17
SA18, SA19
I
SYSTEM ADDRESS: These signals are connected to the address
bus of the PC I/O slot. They are used to select the DM9008 I/O ports
or the boot ROM address
26 - 33
88 - 81
SD0 - SD7
SD8 - SD15
I/O, Z
SYSTEM DATA: These signals are connected to the data bus of the
PC I/O bus slot. They are used to transfer data between the PC and
the DM9008
2
BALE
I
ADDRESS LATCH ENABLE: PC ISA bus BALE signal; used only to
define the timing of IOCHRDY in Remote DMA
This pin is not used if the value of biteA of CRB is 0, and tie to high to
prevent floating.
14
SYSCLK
I
SYSTEM CLOCK: PC ISA bus system clock
This pin is not used if the value of biteA of CRB is 0, and tie to high to
prevent floating.
19
IOR
I
I/O READ: An active low signal used to read data from the DM9008
21
IOW
I
I/O WRITE: An active low signal used to write data to the DM9008
23
SMEMR
I
MEMORY READ: An active low signal used to read boot ROM data
35
RST
I
RESET: An active high signal used to power-on reset the DM9008
24
AEN
I
ADDRESS ENABLE: This is an active low signal used to enable the
system address for the DM9008
25
IOCHRDY
O I, Z
I/O CHANNEL READY: The DM9008 sets this signal low to insert
wait states into the PC ISA bus
89
MEMW
I
MEMORY WRITE: PC ISA bus memory write signal
This pin is not used if the value of biteA of CRB is 0, and tie to high to
prevent floating.
90
MEMR
I
MEMORY READ: PC ISA bus memory read signal
This pin is not used if the value of biteA of CRB is 0, and tie to high to
prevent floating.
95
IO16
O, Z
16-BIT I/O: This signal goes low when the data transfer between the
DM9008 and the PC ISA bus is word wide
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