Release Date:
July, 2002
ds_pl2303_v14
PL-2303 Product Datasheet
-
2 -
Document Revision 1.3
Revision History
Revision
Description Date
1.4
Add Windows CE .NET support feature
August 29, 2002
1.3
Buffer for upstream and downstream data flow
change from 96 to 256 bytes
August 01, 2002
1.2
For Chip Version H (date code 0206)
Add OS Support in Features Section
Correct default values in Table 5. Device
Configuration Register
Add Suspend Current in DC Characteristics Section
Move Operating Temperature in DC Characteristics
to new section
July 03, 2002
Release Date:
July, 2002
ds_pl2303_v14
PL-2303 Product Datasheet
-
3 -
Document Revision 1.3
PL-2303 USB to Serial RS232 Bridge Controller
Features
Full compliance with the USB Specification v1.1 and USB CDC v1.1
Support the RS232 Serial interface
Support automatic handshake mode
Support Remote wake-up and power management
256 bytes buffer each for upstream and downstream data flow
Support default ROM or external EEPROM for device configuration
On chip USB transceiver
On chip crystal oscillator running at 12M Hz
Supports Windows 98/SE, ME, 2000, XP, Windows CE3.0, CE .NET, Linux, and Mac OS
28 Pins SOIC package
OSC2
28
OSC1
27
26
PLL_TEST
VDD_3V3
17
16
DM
15
DP
GND_3V3
18
VDD_PLL
LD_MODE
GND_PLL
GND
VDD
RESET
1
2
3
12
13
14
11
25
24
23
22
21
20
19
4
5
6
7
8
9
10
TRI_MODE
TXD
DTR_N
RTS_N
VDD_232
RXD
RI_N
GND
VDD
DSR_N
DCD_N
CTS_N
SHTD_N
EE_CLK
EE_DATA
SSOP 28 PACKAGE
(TOP VIEW)
Release Date:
July, 2002
ds_pl2303_v14
PL-2303 Product Datasheet
-
5 -
Document Revision 1.3
Overview
The PL-2303 operates as a bridge between one USB port and one standard RS232 Serial port. The two
large on-chip buffers accommodate data flow from two different buses. The USB bulk-type data is adopted
for maximum data transfer. Automatic handshake is supported at the Serial port. With these, a much higher
baud rate can be achieved compared to the legacy UART controller.
This device is also compliant with USB power management and remote wakeup scheme. Only minimum
power is consumed from the host during Suspend. By integrating all the function in a SOIC-28 package, this
chip is suitable for cable embedding. Users just simply hook the cable into PC or hub's USB port, and then
they can connect to any RS-232 devices.
Pin Description
Table 1. Pins Description
Pin
No.
Name
Type
Description
1
TXD
O
Data output to Serial port
2
DTR_N
O
Data Terminal Ready, active low
3
RTS_N
O
Request To Send, active low
4
VDD_232
P
RS-232 VDD. The RS-232 output signals (Pin 1 ~ Pin 3) are
designed for 5V, 3.3V or 3V operation. VDD_232 should be
connected to the same power level of the RS-232 interface.
(The RS-232 input signals are always 5V~3V tolerant.)
Note: This document version only provides 5V DC characteristic
information. Refer to future revisions for updates.
5
RXD
I
Data input from Serial Bus
6
RI_N
I
Ring Indicator, active low
7 GND
P Ground
8 VDD
P
Power
9
DSR_N
I
Data Set Ready, active low
10
DCD_N
I
Data Carrier Detect, active low
11
CTS_N
I
Clear To Send, active low
12
SHTD_N
O
Shut Down RS232 Transceiver
13
EE_CLK
I/O
During Reset, this pin is input for simulation purpose. During
normal operation, this pin is Serial ROM clock
14
EE_DATA
I/O
Serial ROM data signal
15
DP
I/O
USB DPLUS signal
16
DM
I/O
USB DMINUS signal
17
VDD_3V3
P
3.3V power for USB transceiver
18 GND_3V3
P 3.3V
ground
19 RESET
I System
Reset
20 VDD
P Power
21 GND
P Ground
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