2005/04/01
Preliminary
Page 1
SPN1423
N-Channel Enhancement Mode MOSFET
DESCRIPTION
APPLICATIONS
The SPN1423 is the N-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
These devices are particularly suited for low voltage
application such as cellular phone and notebook
computer power management and other battery powered
circuits where high-side switching , and low in-line
power loss are needed in a very small outline surface
mount package.
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
FEATURES
PIN CONFIGURATION ( SOT-323 ; SC-70 )
PART MARKING
20V/2.8A,R
DS(ON)
= 90m@V
GS
=4.5V
20V/2.2A,R
DS(ON)
= 100m@V
GS
=2.5V
Super high density cell design for extremely low
R
DS (ON)
Exceptional on-resistance and maximum DC
current capability
SOT-323 ( SC70 ) package design
2005/04/01
Preliminary
Page 2
SPN1423
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin Symbol
Description
1 G Gate
2 S
Source
3 D
Drain
ORDERING INFORMATION
Part Number
Package
Part Marking
SPN1423S32RG SOT-323
23YW
Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 )
SPN1423S32RG : Tape Reel ; Pb Free
ABSOULTE MAXIMUM RATINGS
(T
A
=25 Unless otherwise noted)
Parameter Symbol
Typical
Unit
Drain-Source Voltage
V
DSS
20
V
Gate Source Voltage
V
GSS
12
V
T
A
=25 2.8
Continuous Drain Current(T
J
=150 )
T
A
=70
I
D
2.2
A
Pulsed Drain Current
I
DM
10
A
Continuous Source Current(Diode Conduction)
I
S
1.6
A
T
A
=25 0.33
Power Dissipation
T
A
=70
P
D
0.21
W
Operating Junction Temperature
T
J
150
Storage Temperature Range
T
STG
-55/150
Thermal Resistance-Junction to Ambient
R
JA
100
/W
2005/04/01
Preliminary
Page 3
SPN1423
N-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25 Unless otherwise noted)
Parameter Symbol
Conditions
Min.
Typ
Max.
Unit
Static
Drain-Source Breakdown Voltage
V
(BR)DSS
V
GS
=0V,I
D
=250uA 20
Gate Threshold Voltage
V
GS(th)
V
DS
=V
GS
,I
D
=250uA 0.45
1.2
V
Gate Leakage Current
I
GSS
V
DS
=0V,V
GS
=12V
100
nA
V
DS
=20V,V
GS
=0V
1
Zero Gate Voltage Drain Current
I
DSS
V
DS
=20V,V
GS
=0V
T
J
=55
10
uA
V
DS
5V,V
GS
=4.5V
5
On-State Drain Current
I
D(on)
V
DS
5V,V
GS
=2.5V
4
A
V
GS
=4.5V,I
D
=2.8A
0.055
0.090
Drain-Source On-Resistance
R
DS(on)
V
GS
=2.5V,I
D
=2.2A
0.075
0.100
Forward Transconductance
gfs
V
DS
=5V,I
D
=2.8A
10 S
Diode Forward Voltage
V
SD
I
S
=1.6A,V
GS
=0V
0.85
1.2
V
Dynamic
Total Gate Charge
Q
g
5.4
10
Gate-Source Charge
Q
gs
0.65
Gate-Drain Charge
Q
gd
V
DS
=10V,V
GS
=4.5V
I
D
2.8A
1.4
nC
Input Capacitance
C
iss
340
Output Capacitance
C
oss
115
Reverse Transfer Capacitance
C
rss
V
DS
=10V,V
GS
=0V
f=1MHz
33
pF
t
d(on)
12
25
Turn-On Time
t
r
36
60
t
d(off)
34
60
Turn-Off Time
t
f
V
DD
=10V,R
L
=5.5
I
D
2.8A,V
GEN
=4.5V
R
G
=6
10 25
ns
2005/04/01
Preliminary
Page 4
SPN1423
N-Channel Enhancement Mode MOSFET
SOT-323 PACKAGE OUTLINE
2005/04/01
Preliminary
Page 5
SPN1423
N-Channel Enhancement Mode MOSFET
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2004 SYNC Power Corporation Printed in Taiwan All Rights Reserved
SYNC Power Corporation
9F-5, No.3-2, Park Street
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