ChipFind - документация

Электронный компонент: XRD5408A

Скачать:  PDF   ZIP
xrd5408
background image
XRD5408/10/12
5V, Low Power, Voltage Output
Serial 8/10/12-Bit DAC Family
Rev. 1.20
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z (510) 668-7017
E
2000
May 2000-2
FEATURES
D
8/10/12-Bit Resolution
D
Operates from a Single 5V Supply
D
Buffered Voltage Output: 13ms Typical Settling Time
D
240mW Total Power Consumption (typ)
D
Guaranteed Monotonic Over Temperature
D
Flexible Output Range: 0V to V
DD
D
8 Lead SOIC and PDIP Package
D
Power On Reset
D
Serial Data Output for Daisy Chaining
APPLICATIONS
D
Digital Calibration
D
Battery Operated Instruments
D
Remote Industrial Devices
D
Cellular Telephones
D
Motion Control
GENERAL DESCRIPTION
The XRD5408/10/12 are low power, voltage output
digital-to-analog converters (DAC) for +3V power supply
operation. The parts draw only 70mA of quiescent current
and are available in both an 8-lead PDIP and SOIC
package.
The XRD5408/10/12 have a 3 wire serial port with an
output allowing the user to daisy chain several of them
together. The serial port will support both Microwiret,
SPIt, and QSPIt standards.
The outputs of the XRD5408/10/12 are set at a gain of +2.
The output short circuit current is 7mA typical.
ORDERING INFORMATION
Part No.
Package
Operating
Temperature Range
XRD5408AID
8 Lead 150 Mil JEDEC SOIC
-40C to +85C
XRD5408AIP
8 Lead 300 Mil PDIP
-40C to +85C
XRD5410AID
8 Lead 150 Mil JEDEC SOIC
-40C to +85C
XRD5410AIP
8 Lead 300 Mil PDIP
-40C to +85C
XRD5412AID
8 Lead 150 Mil JEDEC SOIC
-40C to +85C
XRD5412AIP
8 Lead 300 Mil PDIP
-40C to +85C
background image
XRD5408/10/12
2
Rev. 1.20
BLOCK DIAGRAM
Figure 1. Block Diagram
Shift Register
-
+
V
REFIN
V
DD
CS
SCLK
SDIN
Power On
Reset
Switch
Matrix
AGND
V
DD
DOUT
V
OUT
R
R
2
n
PIN CONFIGURATION
V
DD
V
OUT
V
REFIN
AGND
SDIN
SCLK
CS
DOUT
8 Lead SOIC (Jedec, 0.150")
8
1
5
4
2
3
7
6
8 Lead PDIP (0.300")
V
DD
V
OUT
V
REFIN
AGND
SDIN
SCLK
CS
DOUT
1
2
3
4
8
7
6
5
PIN DESCRIPTION
Pin #
Symbol
Description
1
SDIN
Serial Data Input
2
SCLK
Serial Data Clock
3
CS
Chip Select (Active High)
4
DOUT
Serial Data Output
5
AGND
Analog Ground
6
V
REFIN
Voltage Reference Input
7
V
OUT
DAC Output
8
V
DD
Supply Voltage
background image
XRD5408/10/12
3
Rev. 1.20
ELECTRICAL CHARACTERISTICS
Test Conditions: V
DD
= 5V, GND= 0V, REFIN= 2.048V (External), R
L
= 10kW, C
L
= 100pF, T
A
= T
MIN
to T
MAX
,
Unless Otherwise Noted.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
Static Performance XRD5408
N
Resolution
8
Bits
INL
Relative Accuracy
0.25
0.5
LSB
DNL
Differential Nonlinearity
0.25
0.5
LSB
Guaranteed Monotonic
V
OS
Offset Error
0
3
8
mV
TCV
OS
Offset Tempco
2
ppm/C
PSRR
Offset-Error Power-Supply
Rejection Ratio
0.5
1
mV
4.5V V
DD
5.5V
GE
Gain Error
0.1
0.4
%FS
TCGE
Gain-Error Tempco
10
ppm/C
PSRR
Power-Supply
Rejection Ratio
0.1
1.25
mV
4.5V V
DD
5.5V, Measured at
FS
Static Performance XRD5410
N
Resolution
10
Bits
INL
Relative Accuracy
0.5
1
LSB
DNL
Differential Nonlinearity
0.25
0.5
LSB
Guaranteed Monotonic
V
OS
Offset Error
0
3
8
mV
TCV
OS
Offset Tempco
2
ppm/C
PSRR
Offset-Error Power-Supply
Rejection Ratio
0.5
1
mV
4.5V V
DD
5.5V
GE
Gain Error
0.1
0.4
%FS
TCGE
Gain-Error Tempco
10
ppm/C
PSRR
Power-Supply
Rejection Ratio
0.1
1.25
mV
4.5V V
DD
5.5V, Measured at
FS
Static Performance XRD5412
N
Resolution
12
Bits
INL
Relative Accuracy
2
4
LSB
DNL
Differential Nonlinearity
0.5
-1
LSB
Guaranteed Monotonic
+1.25
LSB
V
OS
Offset Error
0
3
8
mV
TCV
OS
Offset Tempco
2
ppm/C
PSRR
Offset-Error Power-Supply
Rejection Ratio
0.5
1
mV
4.5V V
DD
5.5V
GE
Gain Error
0.1
0.4
%FS
TCGE
Gain-Error Tempco
10
ppm/C
PSRR
Power-Supply
Rejection Ratio
0.1
1.25
mV
4.5V V
DD
5.5V, Measured at
FS
background image
XRD5408/10/12
4
Rev. 1.20
ELECTRICAL CHARACTERISTICS
(CONT'D)
Test Conditions: V
DD
= 5V, GND= 0V, REFIN= 2.048V (External), R
L
= 10kW, C
L
= 100pF, T
A
= T
MIN
to T
MAX
,
Unless Otherwise Noted.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
Voltage Output (V
OUT
) XRD5408/10/12
V
O
Output Voltage Range
0
V
DD
--0.4
V
V
REG
Output Load Regulation
2
4
mV
V
OUT
= 2V, R
L
=2kW
+I
SC
Short-Circuit Current, Sink
13
mA
V
OUT
= V
DD
-I
SC
Short-Circuit Current, Source
7
mA
V
OUT
= GND
Voltage Reference Input (V
REFIN
) XRD5408/10/12
V
REFIN
Voltage Range
0
V
DD
V
Output Swing Limited, Not Code Dependent
R
IN
Input Resistance
40
65
kW
TCR
IN
Input Resistance Tempco
1500
ppm/C
C
IN
Input Capacitance
32
40
pF
Not Code Dependent
AC
FT
AC Feedthrough
-80
dB
REFIN = 1kHz, 2Vp-p, SD
IN
=000h
Digital Inputs (SDIN, SCLK, CS) XRD5408/10/12
V
IH
Input High
3.5
V
V
IL
Input Low
1
V
I
IN
Input Current
1
mA
V
IN
=0V or V
DD
C
IN
Input Capacitance
10
pF
Digital Output (DOUT) XRD5408/10/12
V
OH
Output High
V
DD
-1
V
I
SOURCE
=4mA
V
OL
Output Low
0.4
V
I
SINK
=4mA
Dynamic Performance XRD5408/10/12
SR
Voltage-Output Slew Rate
0.13
0.21
V/ms
T
A
=+25C
t
s
Voltage-Output Settling Time
13
15
ms
1/2LSB, V
OUT
=2V
D
FT
Digital Feedthrough
1
nV-s
CS=V
DD
, SDIN=SCLK=100kHz
SINAD
Signal-to-Noise Plus Distortion
68
dB
V
REFIN
=1kHz, 2Vp-p F.S., SDIN=Full
Scale, --3dB BW=250kHz
Power Supply XRD5408/10/12
V
DD
Positive Supply Voltage
4.5
5.5
V
I
DD
Power Supply Current
35
60
mA
All Inputs=0V or V
DD
, Output=No Load,
I
REF
Not Included, V
O
=0V (Note
1
)
Switching Characteristics XRD5408/10/12
t
CSS
CS Setup Time
10
20
ns
t
CSH0
SCLK Fall to CS Fall Hold Time
5
ns
t
CSH1
SCLK Fall to CS Rise Hold TIme
0
ns
t
CH
SCLK High Width
20
35
ns
t
CL
SCLK Low Width
20
35
ns
Notes:
1
Total supply current consumption = I
DD
+ I
REF
+ (V
O
/ 70K.)
background image
XRD5408/10/12
5
Rev. 1.20
ELECTRICAL CHARACTERISTICS
(CONT'D)
Test Conditions: V
DD
= 5V, GND= 0V, REFIN= 2.048V (External), R
L
= 10kW, C
L
= 100pF, T
A
= T
MIN
to T
MAX
,
Unless Otherwise Noted.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
t
DS
D
IN
Setup Time
10
45
ns
t
DH
D
IN
Hold Time
0
ns
t
DO
D
OUT
Valid Propagation Delay
8
15
ns
C
L
= 50pF
t
CSW
CS High Pulse Width
20
40
ns
t
CS1
CS Rise to SCLK Rise Setup
Time
10
20
ns
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND
-0.3V, +7V
. . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Input Voltage to GND
-0.3V, V
DD
+0.3V
. . . . . .
V
REFIN
-0.3V, V
DD
+0.3V
. . . . . . . . . . . . . . . . . . . . . . . . .
V
OUT
1
V
DD
, GND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous Current, Any Pin
-20mA, +20mA
. . . . . . . .
Package Power Dissipation Ratings (T
A
= +70C)
PDIP (derate 9mW/C above +70C)
117mW
. . . .
SOIC (derate 6mW/C above +70C)
155mW
. . .
Operating Temperature Range
-40C to + 85C
. . . . .
Storage Temperature Range
-65C to +165C
. . . . . .
Lead Temperature (soldering, 10 sec)
+300C
. . . . . .
Notes
1
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
2
Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short
transients outside the supplies of less than 100mA for less than 100
m
s.