E S I

Rev. 0E May 25, 2006

ES29DL320

Excel Semiconductor inc.

ADVANCED INFORMATION

ES29DL320

32Mbit(4M x 8/2M x 16)

CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

GENERAL FEATURES

· Single power supply operation
- 2.7V - 3.6V for read, program and erase operations

· Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in another bank
- Zero latency between read and write operations

· Multi-Bank architecture
- Read may occur in any of the banks not being
written or erased
- Multi-Bank may be grouped by customer to achieve
desired bank divisions

· Top or Bottom boot block
- ES29DL320T for Top boot block device
- ES29DL320B for Bottom boot block device

· A 256 bytes of extra sector for security code
- Factory locked
- Customer lockable

· Package Options
- 48-pin TSOP
- 48-ball FBGA
- All Pb-free products are RoHS-Compliant

· Low Vcc write inhibit
· Manufactured on 0.18um process technology
· Compatible with JEDEC standards
- Pinout and software compatible with single-power
supply flash standard

DEVICE PERFORMANCE

· Read access time
- 70ns/90ns for normal Vcc range ( 2.7V ~ 3.6V )

· Program and erase time
- Program time : 6us/byte, 8us/word ( typical )
- Accelerated program time : 4us/word ( typical )
- Sector erase time : 0.7sec/sector ( typical )

· Power consumption (typical values)
- 15uA in standby or automatic sleep mode
- 10mA active read current at 5MHz
- 15mA active write current during program or erase
· Minimum 100,000 program/erase cycles per sector
· 20 Year data retention at

125

SOFTWARE FEATURES

· Erase Suspend / Erase Resume
· Data# poll and toggle for program/erase status
· CFI ( Common Flash Interface) supported
· Unlock Bypass Program
· Autoselect mode
· Auto-sleep mode after t

ACC

+ 30ns

HARDWARE FEATURES

· Hardware reset input pin ( RESET#)
- Provides a hardware reset to device
- Any internal device operation is terminated and the
device returns to read mode by the reset

· Ready/Busy# output pin ( RY/BY#)
- Provides a program or erase operational status
about whether it is finished for read or still being
progressed

· WP#/ACC input pin
- Two outermost boot sectors are protected when
WP# is set to low, regardless of sector protection
- Program speed is accelerated by raising WP#/ACC
to a high voltage (8.5V ~ 9.5V)

· Sector protection / unprotection ( RESET# , A9 )
- Hardware method of locking a sector to prevent
any program or erase operation within that sector
- Two methods are provided :
- In-system method by RESET# pin
- A9 high-voltage method for PROM programmers

· Temporary Sector unprotection ( RESET# )
- Allows temporary unprotection of previously
protected sectors to change data in-system

E S I

Rev. 0E May 25, 2006

ES29DL320

Excel Semiconductor inc.

ADVANCED INFORMATION

The ES29DL320 is a 32 megabit, 3.0 volt-only flash
memory device, organized as 4M x 8 bits (Byte
mode) or 2M x 16 bits (Word mode) which is config-
urable by BYTE#. Eight boot sectors and sixty three
main sectors with uniform size are provided : 8K
bytes x 8 and 64K bytes x 63. The device is manu-
factured with ESI's proprietary, high performance
and highly reliable 0.18um CMOS flash technology.
The device can be programmed or erased in-sys-
tem with standard 3.0 Volt Vcc supply (2.7V-3.6V)
and can also be programmed in standard EPROM
programmers. The device offers minimum endur-
ance of 100,000 program/erase cycles and more
than 20 years of data retention.

The ES29DL320 offers access time as fast as
70ns or 90ns, allowing operation of high-speed
microprocessors without wait states. Three sepa-
rate control pins are provided to eliminate bus con-
tention : chip enable (CE#), write enable (WE#) and
output enable (OE#).

All program and erase operation are automatically
and internally performed and controlled by embed-
ded program/erase algorithms built in the device.
The device automatically generates and times the
necessary high-voltage pulses to be applied to the
cells, performs the verification, and counts the num-
ber of sequences. Some status bits (DQ7, DQ6 and
DQ5) read by data# polling or toggling between
consecutive read cycles provide to the users the
internal status of program/erase operation: whether
it is successfully done or still being progressed.

Extra Security Sector of 256 bytes

In the device, an extra security sector of 256 bytes
is provided to customers. This extra sector can be
used for various purposes such as storing ESN
(Electronic Serial Number) or customer's security
codes. Once after the extra sector is written, it can
be permanently locked by the device manufacturer(
factory-locked) or a customer(customer-lockble).
At the same time, a lock indicator bit (DQ7) is per-
manently set to a 1 if the part is factory- locked, or
set to 0 if it is customer-lockable.

Therefore, this lock indicator bit (DQ7) can be prop-
erly used to avoid that any customer-lockable part is
used to replace a factory-locked part. The extra
security sector is an extra memory space for cus-
tomers when it is used as a customer-lockable ver-
sion. So, it can be read and written like any other
sectors. But it should be noted that the number of E/
W(Erase and Write) cycles is limited to 300 times
(maximum) only in the Security Sector.

Special services such as ESN and factory-locked
are available to customers ( ESI's Special-Code
service ) The ES29DL320 is completely compatible
with the JEDEC standard command set of single
power supply Flash. Commands are written to the
internal command register using standard write tim-
ings of microprocessor and data can be read out
from the cell array in the device with the same way
as used in other EPROM or flash devices.

Simultaneous Read / Write Operation

The simultaneous read / write architecture provides
simultaneous operation by dividing the memory
space into multi-bank. Sector addresses are fixed,
system software can be used to form user-defined
bank groups.

During an erase / program operation, any of the non-
busy banks may be read from. Note that only two
banks can operate simultaneously. The device
allows a host system to program or erase in one
bank, then immediately and simultaneously read
from the other bank, with zero latency. This releases
the system from waiting for the completion of pro-
gram or erase operations.

The ES29DL320 can be organized as either a top or
bottom boot sector configuration.

GENERAL PRODUCT DESCRIPTION

E S I

Rev. 0E May 25, 2006

ES29DL320

Excel Semiconductor inc.

ADVANCED INFORMATION

PIN DESCRIPTION

Pin

Description

A0-A20

21 Addresses

DQ0-DQ14

15 Data Inputs/Outputs

DQ15/A-1

DQ15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)

CE#

Chip Enable

OE#

Output Enable

WE#

Write Enable

WP#/ACC

Hardware Write Protect/Acceleration Pin

RESET#

Hardware Reset Pin, Active Low

BYTE#

Selects 8-bit or 16-bit mode

RY/BY#

Ready/Busy Output

Vcc

3.0 volt-only single power supply
(see Product Selector Guide for speed options and voltage supply tolerances)

Vss

Device Ground

Pin Not Connected Internally

LOGIC SYMBOL

DQ0 ~ DQ15
(A-1)

RY/BY#

BYTE#

RESET#

OE#

CE#

A0 ~ A20

WP#/ACC

WE#

16 or 8

E S I

Rev. 0E May 25, 2006

ES29DL320

Excel Semiconductor inc.

ADVANCED INFORMATION

CONNECTION DIAGRAM

48-Ball FBGA 6 x 8 mm)

(Top View, Balls Facing Down)

A15
A14
A13

A12
A11
A10

A19

A20

WE#

RESET#

WP#/ACC

RY/BY#

A18
A17

A7
A6
A5
A4
A3
A2
A1

A16
BYTE#
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4

Vcc
DQ11

DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
Vss
CE#
A0

1
2
3

5
6
7
8
9
10
11
12
13

15
16
17
18
19
20
21
22
23
24

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25

48-Pin Standard TSOP

ES29DL320

A13

A12

A14

A15

A16

DQ15/

Vss

WE#

OE#

CE#

WP#/

A11

DQ7

DQ14

DQ13

DQ6

A19

A18

DQ5

A20

DQ2

DQ0

DQ8

DQ9

DQ1

DQ10

DQ11

DQ3

DQ12

Vcc

DQ4

A10

C D E F G H J K

BYTE#

A-1

RESET#

RY/

A17

Vss

ACC

BY#

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