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Электронный компонент: 4069UB

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October 1987
Revised January 1999
CD406
9UB
C

In
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ter
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1999 Fairchild Semiconductor Corporation
DS005975.prf
www.fairchildsemi.com
CD4069UBC
Inverter Circuits
General Description
The CD4069UB consists of six inverter circuits and is man-
ufactured using complementary MOS (CMOS) to achieve
wide power supply operating range, low power consump-
tion, high noise immunity, and symmetric controlled rise
and fall times.
This device is intended for all general purpose inverter
applications where the special characteristics of the
MM74C901, MM74C907, and CD4049A Hex Inverter/Buff-
ers are not required. In those applications requiring larger
noise immunity the MM74C14 or MM74C914 Hex Schmitt
Trigger is suggested.
All inputs are protected from damage due to static dis-
charge by diode clamps to V
DD
and V
SS
.
Features
s
Wide supply voltage range:
3.0V to 15V
s
High noise immunity:
0.45 V
DD
typ.
s
Low power TTL compatibility:
Fan out of 2 driving 74L
or 1 driving 74LS
s
Equivalent to MM74C04
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix "X" to the ordering code.
Connection Diagram
Pin Assignments for SOIC and DIP
Schematic Diagram
Order Number
Package Number
Package Description
CD4069UBCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Body
CD4069UBCSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4069UBCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com
2
CD
4
069UBC
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
(Note 2)
Note 1: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of "Recom-
mended Operating Conditions" and Electrical Characteristics table provide
conditions for actual device operation.
Note 2: V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 3)
Note 3: V
SS
=
0V unless otherwise specified.
Note 4: I
OH
and I
OL
are tested one output at a time.
DC Supply Voltage (V
DD
)
-
0.5V to
+
18 V
DC
Input Voltage (V
IN
)
-
0.5V to V
DD
+
0.5 V
DC
Storage Temperature Range (T
S
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
DC Supply Voltage (V
DD
)
3V to 15V
DC
Input Voltage (V
IN
)
0V to V
DD
V
DC
Operating Temperature Range (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
Conditions
-
40
C
+
25
C
+
85
C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device Current
V
DD
=
5V,
1.0
1.0
7.5
A
V
IN
=
V
DD
or V
SS
V
DD
=
10V,
2.0
2.0
15
A
V
IN
=
V
DD
or V
SS
V
DD
=
15V,
4.0
4.0
30
A
V
IN
=
V
DD
or V
SS
V
OL
LOW Level Output Voltage
|I
O
|
<
1
A
V
DD
=
5V
0.05
0
0.05
0.05
V
V
DD
=
10V
0.05
0
0.05
0.05
V
V
DD
=
15V
0.05
0
0.05
0.05
V
V
OH
HIGH Level Output Voltage
|I
O
|
<
1
A
V
DD
=
5V
4.95
4.95
4.95
V
V
DD
=
10V
9.95
9.95
9.95
V
V
DD
=
15V
14.95
14.95
14.95
V
V
IL
LOW Level Input Voltage
|I
O
|
<
1
A
V
DD
=
5V, V
O
=
4.5V
1.0
1.0
1.0
V
V
DD
=
10V, V
O
=
9V
2.0
2.0
2.0
V
V
DD
=
15V, V
O
=
13.5V
3.0
3.0
3.0
V
V
IH
HIGH Level Input Voltage
|I
O
|
<
1
A
V
DD
=
5V, V
O
=
0.5V
4.0
4.0
4.0
V
V
DD
=
10V, V
O
=
1V
8.0
8.0
8.0
V
V
DD
=
15V, V
O
=
1.5V
12.0
12.0
12.0
V
I
OL
LOW Level Output Current
V
DD
=
5V, V
O
=
0.4V
0.52
0.44
0.88
0.36
mA
(Note 4)
V
DD
=
10V, V
O
=
0.5V
1.3
1.1
2.25
0.9
mA
V
DD
=
15V, V
O
=
1.5V
3.6
3.0
8.8
2.4
mA
I
OH
HIGH Level Output Current
V
DD
=
5V, V
O
=
4.6V
-
0.52
-
0.44
-
0.88
-
0.36
mA
(Note 4)
V
DD
=
10V, V
O
=
9.5V
-
1.3
-
1.1
-
2.25
-
0.9
mA
V
DD
=
15V, V
O
=
13.5V
-
3.6
-
3.0
-
8.8
-
2.4
mA
I
IN
Input Current
V
DD
=
15V, V
IN
=
0V
-
0.30
-
10
-
5
-
0.30
-
1.0
A
V
DD
=
15V, V
IN
=
15V
0.30
10
-
5
0.30
1.0
A
3
www.fairchildsemi.com
CD406
9UB
C
AC Electrical Characteristics
(Note 5)
T
A
=
25
C, C
L
=
50 pF, R
L
=
200 k
, t
r
and t
f
20 ns, unless otherwise specified
Note 5: AC Parameters are guaranteed by DC correlated testing.
Note 6: C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note--
AN-90.
AC Test Circuits and Switching Time Waveforms
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHL
or t
PLH
Propagation Delay Time from
V
DD
=
5V
50
90
ns
Input to Output
V
DD
=
10V
30
60
ns
V
DD
=
15V
25
50
ns
t
THL
or t
TLH
Transition Time
V
DD
=
5V
80
150
ns
V
DD
=
10V
50
100
ns
V
DD
=
15V
40
80
ns
C
IN
Average Input Capacitance
Any Gate
6
15
pF
C
PD
Power Dissipation Capacitance
Any Gate (Note 6)
12
pF
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4
CD
4
069UBC
Typical Performance Characteristics
Gate Transfer Characteristics
Power Dissipation vs
Frequency
Propagation Delay vs
Ambient Temperature
Propagation Delay vs
Ambient Temperature
Propagation Delay Time
vs Load Capacitance
5
www.fairchildsemi.com
CD406
9UB
C
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Body
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm wide
Package Number M14D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
CD
4
069UBC I
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LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A