1999 Fairchild Semiconductor Corporation
Ds009966
www.fairchildsemi.com
November 1988
Revised November 1999
7
4
AC
5
40 Oct
a
l
Buff
er/
L
ine
Dri
ver
wit
h
3-ST
A
T
E Outpu
t
s
74AC540
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The AC540 is an octal buffer/line drivers designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers.
These devices are similar in function to the AC240 while
providing flow-through architecture (inputs on opposite side
from outputs). This pinout arrangement makes these
devices especially useful as output ports for microproces-
sors, allowing ease of layout and greater PC board density.
Features
s
I
CC
and I
OZ
reduced by 50%
s
3-STATE inverting outputs
s
Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
s
Output source/sink 24 mA
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Truth Table
H
=
HIGH Voltage Level
X
=
Immaterial
L
=
LOW Voltage Level
Z
=
High Impedance
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74AC540SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Body
74AC540SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC540MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC540PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Inputs
Outputs
OE
1
OE
2
I
L
L
H
L
H
X
X
Z
X
H
X
Z
L
L
L
H
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2
74AC540
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
circuits outside databook specifications.
DC Electrical Characteristics
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
V
I
=
V
CC
+
0.5V
+
20 mA
DC Input Voltage (V
I
)
-
0.5V to V
CC
+
0.5V
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source
or Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
50 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Junction Temperature (T
J
)
PDIP
140
C
Supply Voltage (V
CC
)
2.0V to 6.0V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate (
V/
t)
125 mV/ns
V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
3.0
1.5
2.1
2.1
V
OUT
=
0.1V
Input Voltage
4.5
2.25
3.15
3.15
V
or V
CC
-
0.1V
5.5
2.75
3.85
3.85
V
IL
Maximum LOW Level
3.0
1.5
0.9
0.9
V
OUT
=
0.1V
Input Voltage
4.5
2.25
1.35
1.35
V
or V
CC
-
0.1V
5.5
2.75
1.65
1.65
V
OH
Minimum HIGH Level
3.0
2.99
2.9
2.9
Output Voltage
4.5
4.49
4.4
4.4
V
I
OUT
=
-
50
A
5.5
5.49
5.4
5.4
V
IN
=
V
IL
or V
IH
3.0
2.56
2.46
I
OH
=
-
12 mA
4.5
3.86
3.76
V
I
OH
=
-
24 mA
5.5
4.86
4.76
I
OH
=
-
24 mA (Note 2)
V
OL
Maximum LOW Level
3.0
0.002
0.1
0.1
Output Voltage
4.5
0.001
0.1
0.1
V
I
OUT
=
50
A
5.5
0.001
0.1
0.1
V
IN
=
V
IL
or V
IH
3.0
0.36
0.44
I
OL
=
12 mA
4.5
0.36
0.44
V
I
OL
=
24 mA
5.5
0.36
0.44
I
OL
=
24 mA (Note 2)
I
IN
Maximum
Input
5.5
0.1
1.0
A
V
I
=
V
CC
, GND
(Note 4)
Leakage Current
I
OZ
Maximum 3-STATE
V
I
(OE)
=
V
IL
, V
IH
Current
5.5
0.25
2.5
A
V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
=
1.65V Max
I
OHD
Output Current (Note 3)
5.5
-
75
mA
V
OHD
=
3.85V Min
I
CC
Maximum
Quiescent
5.5
4.0
40.0
A
V
IN
=
V
CC
(Note 4)
Supply Current
or GND
3
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74
A
C
54
0
AC Electrical Characteristics
Note 5: Voltage Range 3.3 is 3.3V
0.3V
Voltage Range 5.0 is 5.0V
0.5V
Capacitance
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 5)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.3
1.5
5.5
7.5
1.0
8.0
ns
Data to Output
5.0
1.5
4.0
6.0
1.0
6.5
t
PHL
Propagation Delay
3.3
1.5
5.0
7.0
1.0
7.5
ns
Data to Output
5.0
1.5
4.0
5.5
1.0
6.0
t
PZH
Output Enable Time
3.3
3.0
8.5
11.0
2.5
12.0
ns
5.0
2.0
6.5
8.5
2.0
9.5
t
PZL
Output Enable Time
3.3
2.5
7.5
10.0
2.0
11.0
ns
5.0
2.0
6.0
7.5
1.5
8.5
t
PHZ
Output Disable Time
3.3
2.5
8.5
13.0
1.5
14.0
ns
5.0
1.5
7.5
10.5
1.0
11.0
t
PLZ
Output Disable Time
3.3
2.5
7.0
10.0
2.0
11.0
ns
5.0
1.5
6.0
8.0
1.5
9.0
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
=
OPEN
C
PD
Power Dissipation Capacitance
30.0
pF
V
CC
=
5.0V
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4
74AC540
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Body
Package Number M20B
5
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74
A
C
54
0
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
74AC540
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
7
www.fairchildsemi.com
7
4
AC
5
40 Oct
a
l
Buff
er/
L
ine
Dri
ver
wit
h
3-ST
A
T
E Outpu
t
s
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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