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Электронный компонент: 74ALVC16501MTD

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2001 Fairchild Semiconductor Corporation
DS500683
www.fairchildsemi.com
October 2001
Revised October 2001
7
4
AL
VC1650
1
Low V
o
l
t
a
g
e
18-
Bit

Uni
ver
sal Bus
T
r
anscei
vers

wit
h
3.6V T
o
ler
a
nt Inp
u
ts and O
u
t
puts
74ALVC16501
Low Voltage 18-Bit Universal Bus Transceivers
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16501 is an 18-bit universal bus transceiver
which combines D-type latches and D-type flip-flops to
allow data flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the
device operates in the transparent mode when LEAB is
HIGH. When LEAB is LOW, the A data is latched if CLKAB
is held at a HIGH or LOW logic level. If LEAB is LOW, the A
bus data is stored in the latch/flip-flop on the LOW-to-HIGH
transition of CLKAB. When OEAB is HIGH, the outputs are
active. When OEAB is LOW, the outputs are in a high-
impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA is active
LOW).
The ALVC16501 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V.
The ALVC16501 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.65V3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
(A to B, B to A)
3.4 ns max for 3.0V to 3.6V V
CC
4.0 ns max for 2.3V to 2.7V V
CC
7.0 ns max for 1.65V to 1.95V V
CC
s
Power-down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Uses patented noise/EMI reduction circuitry
s
Latchup conforms to JEDEC JED78
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1: To ensure the high-impedance state during power up or power
down, OEBA should be tied to V
CC
through a pull-up resistor and OEAB
should be tied to GND through a pull-down resistor; the minimum value of
the resistors is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Order Number
Package Number
Package Description
74ALVC16501MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
www.fairchildsemi.com
2
74
A
L
VC16501
Connection Diagram
Pin Descriptions
Function Table
(Note 2)
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial (HIGH or LOW, inputs may not float)
Z
=
High Impedance
Note 2: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA,
LEBA and CLKBA. OEBA is active LOW.
Note 3: Output level before the indicated steady-state input conditions
were established.
Note 4: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Pin Names
Description
OEAB
Output Enable Input for A to B Direction
(Active HIGH)
OEBA
Output Enable Input for B to A Direction
(Active LOW)
LEAB, LEBA
Latch Enable Inputs
CLKAB,
CLKBA
Clock Inputs
A
1
A
18
Side A Inputs or 3-STATE Outputs
B
1
B
18
Side B Inputs or 3-STATE Outputs
Inputs
Outputs
OEAB
LEAB
CLKAB
A
n
B
n
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
L
L
H
L
H
H
H
L
H
X
B
0
(Note 3)
H
L
L
X
B
0
(Note 4)
3
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7
4
AL
VC1650
1
Logic Diagram
www.fairchildsemi.com
4
74
A
L
VC16501
Absolute Maximum Ratings
(Note 5)
Recommended Operating
Conditions
(Note 7)
Note 5: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The "Recommended Operating Conditions" table will define the condi-
tions for actual device operation.
Note 6: I
O
Absolute Maximum Rating must be observed.
Note 7: Floating or unused inputs must be held HIGH or LOW.
DC Electrical Characteristics
Supply Voltage (V
CC
)
-
0.5V to
+
4.6V
DC Input Voltage (V
I
)
-
0.5V to 4.6V
Output Voltage (V
O
) (Note 6)
-
0.5V to V
CC
+
0.5V
DC Input Diode Current (I
IK
)
V
I
<
0V
-
50 mA
DC Output Diode Current (I
OK
)
V
O
<
0V
-
50 mA
DC Output Source/Sink Current
(I
OH
/I
OL
)
50 mA
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND)
100 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Supply
Operating 1.65V
to
3.6V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Free Air Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate (
t/
V)
V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
10 ns/V
Symbol
Parameter
Conditions
V
CC
Min
Max
Units
(V)
V
IH
HIGH Level Input Voltage
1.65 -1.95
0.65 x V
CC
V
2.3 - 2.7
1.7
2.7 - 3.6
2.0
V
IL
LOW Level Input Voltage
1.65 -1.95
0.35 x V
CC
V
2.3 - 2.7
0.7
2.7 - 3.6
0.8
V
OH
HIGH Level Output Voltage
I
OH
=
-
100
A
1.65 - 3.6
V
CC
- 0.2
V
I
OH
=
-
4 mA
1.65
1.2
I
OH
=
-
6 mA
2.3
2
I
OH
=
-
12 mA
2.3
1.7
2.7
2.2
3.0
2.4
I
OH
=
-
24 mA
3.0
2
V
OL
LOW Level Output Voltage
I
OL
=
100
A
1.65 - 3.6
0.2
V
I
OL
=
4 mA
1.65
0.45
I
OL
=
6 mA
2.3
0.4
I
OL
=
12mA
2.3
0.7
2.7
0.4
I
OL
=
24 mA
3
0.55
I
I
Input Leakage Current
0
V
I
3.6V
3.6
5.0
A
I
OZ
3-STATE Output Leakage
0
V
O
3.6V
3.6
10
A
I
CC
Quiescent Supply Current
V
I
=
V
CC
or GND, I
O
=
0
3.6
40
A
I
CC
Increase in I
CC
per Input
V
IH
=
V
CC
-
0.6V
3 -3.6
750
A
5
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7
4
AL
VC1650
1
AC Electrical Characteristics
Capacitance
Symbol
Parameter
T
A
=
-
40
C to
+
85
C, R
L
=
500
Units
C
L
=
50 pF
C
L
=
30 pF
V
CC
=
3.3V
0.3V
V
CC
=
2.7V
V
CC
=
2.5V
0.2V
V
CC
=
1.8V
0.15V
Min
Max
Min
Max
Min
Max
Min
Max
f
MAX
Maximum Clock Frequency
250
200
200
100
ns
t
PHL
, t
PLH
Propagation Delay
1.1
3.4
1.3
4.0
0.8
3.5
1.5
7.0
ns
Bus to Bus
t
PHL
, t
PLH
Propagation Delay
1.1
4.0
1.3
4.9
0.8
4.4
1.5
8.8
ns
CLK to Bus
t
PHL
, t
PLH
Propagation Delay
1.1
4.3
1.3
5.4
0.8
4.9
1.5
9.8
ns
LE to Bus
t
PZL
, t
PZH
Output Enable Time
1.1
4.3
1.3
5.4
0.8
4.9
1.5
9.8
ns
t
PLZ
, t
PHZ
Output Disable Time
1.3
4.2
1.3
4.7
0.8
4.2
0.8
7.6
ns
t
W
Pulse Width
1.5
1.5
1.5
4.0
ns
t
S
Setup Time
1.5
1.5
1.5
2.5
ns
t
H
Hold Time
1.0
1.0
1.0
1.0
ns
Symbol
Parameter
Conditions
T
A
=
+
25
C
Units
V
CC
Typical
C
IN
Input Capacitance
V
I
=
0V or V
CC
3.3
6
pF
C
OUT
Output Capacitance
V
I
=
0V or V
CC
3.3
7
pF
C
PD
Power Dissipation Capacitance Outputs Enabled f
=
10 MHz, C
L
=
50 pF
3.3
20
pF
2.5
20