ChipFind - документация

Электронный компонент: 74F109SC

Скачать:  PDF   ZIP
1999 Fairchild Semiconductor Corporation
DS009471
www.fairchildsemi.com
April 1988
Revised November 1999
7
4
F109 D
u
a
l
JK
Posi
ti
ve Edge-T
r
i
gge
red Fli
p
-Fl
o
p
74F109
Dual JK Positive Edge-Triggered Flip-Flop
General Description
The F109 consists of two high-speed, completely indepen-
dent transition clocked JK flip-flops. The clocking operation
is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D-type flip-flop (refer
to F74 data sheet) by connecting the J and K inputs.
Asynchronous Inputs:
LOW input to S
D
sets Q to HIGH level
LOW input to C
D
sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes
both Q and Q HIGH
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number
Package Number
Package Description
74F109SC M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
74F109SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE 11, 5.3mm Wide
74F109PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com
2
74F109
Truth Table
H (h)
=
HIGH Voltage Level
L (l)
=
LOW Voltage Level
=
LOW-to-HIGH Transition
X
=
Immaterial
Q
0
(Q
0
)
=
Before LOW-to-HIGH Transition of Clock
Lower case letters indicate the state of the referenced output one setup time prior to the LOW-to-HIGH clock transition.
Unit Loading/Fan Out
Block Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Outputs
S
D
C
D
CP
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H
H
H
H
I
I
L
H
H
H
h
I
Toggle
H
H
I
h
Q
Q
H
H
h
h
H
L
H
H
L
X
X
Q
Q
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
J
1
, J
2
, K
1
, K
2
Data Inputs
1.0/1.0
20
A/
-
0.6 mA
CP
1
, CP
2
Clock Pulse Inputs (Active Rising Edge)
1.0/1.0
20
A/
-
0.6 mA
C
D1
, C
D2
Direct Clear Inputs (Active LOW)
1.0/3.0
20
A/
-
1.8 mA
S
D1
, S
D2
Direct Set Inputs (Active LOW)
1.0/3.0
20
A/
-
1.8 mA
Q
1
, Q
2
, Q
1
, Q
2
Outputs
50/33.3
-
1 mA/20 mA
3
www.fairchildsemi.com
7
4
F109
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature
-
65
C to
+
150
C
Ambient Temperature under Bias
-
55
C to
+
125
C
Junction Temperature under Bias
-
55
C to
+
175
C
V
CC
Pin Potential to
Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
cc
= 0V)
Standard Output
-
0.5V to V
CC
3-STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Free Air Ambient Temperature
0
C to
+
70
C
Supply Voltage
+
4.5V to
+
5.5V
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH Voltage
10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
5% V
CC
2.7
I
OH
=
-
1 mA
V
OL
Output LOW Voltage
10% V
CC
0.5
V
Min
I
OL
=
20 mA
I
IH
Input HIGH Current
5.0
A
Max
V
IN
=
2.7V
I
BVI
Input HIGH Current Breakdown Test
7.0
A
Max
V
IN
=
7.0V
I
CEX
Output HIGH Leakage Current
50
A
Max
V
OUT
=
V
CC
V
ID
Input Leakage Test
4.75
V
0.0
I
ID
=
1.9
A
All Other Pins Grounded
I
OD
Output Leakage
3.75
A
0.0
V
IOD
=
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW Current
-
0.6
mA
Max
V
IN
=
0.5V (J
n
, K
n
)
-
1.8
mA
Max
V
IN
=
0.5V (C
Dn
, S
Dn
)
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
CC
Power Supply Current
11.7
17.0
mA
Max
CP
=
0V
www.fairchildsemi.com
4
74F109
AC Electrical Characteristics
AC Operating Requirements
Symbol
Parameter
T
A
=
+
25
C
T
A
=
0
C to
+
70
C
Units
V
CC
=
+
5.0V
V
CC
=
+
5.0V
C
L
=
50 pF
C
L
=
50 pF
Min
Typ
Max
Min
Max
f
MAX
Maximum Clock Frequency
100
125
90
MHz
t
PLH
Propagation Delay
3.8
5.3
7.0
3.8
8.0
ns
t
PHL
CP
n
to Q
n
or Q
n
4.4
6.2
8.0
4.4
9.2
t
PLH
Propagation Delay
3.2
5.2
7.0
3.2
8.0
ns
t
PHL
C
Dn
or S
Dn
to
3.5
7.0
9.0
3.5
10.5
ns
Q
n
or Q
n
Symbol
Parameter
T
A
=
+
25
C
T
A
=
0
C to
+
70
C
Units
V
CC
=
+
5.0V
V
CC
=
+
5.0V
Min
Max
Min
Max
t
S
(H)
Setup Time, HIGH or LOW
3.0
3.0
ns
t
S
(L)
J
n
or K
n
to CP
n
3.0
3.0
t
H
(H)
Hold Time, HIGH or LOW
1.0
1.0
t
H
(L)
J
n
or K
n
to CP
n
1.0
1.0
t
W
(H)
CP
n
Pulse Width
4.0
4.0
ns
t
W
(L)
HIGH or LOW
5.0
5.0
t
W
(L)
C
Dn
or S
Dn
Pulse Width LOW
4.0
4.0
ns
t
REC
Recovery Time
2.0
2.0
ns
C
Dn
or S
Dn
to CP
5
www.fairchildsemi.com
7
4
F109
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
Package Number M16A