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Электронный компонент: 74F139PC

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1999 Fairchild Semiconductor Corporation
DS009479
www.fairchildsemi.com
April 1988
Revised July 1999
7
4F139 D
u
a
l
1-of
-4 Decoder
/Demult
i
p
l
exer
74F139
Dual 1-of-4 Decoder/Demultiplexer
General Description
The F139 is a high-speed, dual 1-of-4 decoder/demulti-
plexer. The device has two independent decoders, each
accepting two inputs and providing four mutually exclusive
active LOW outputs. Each decoder has an active LOW
Enable input which can be used as a data input for a 4-out-
put demultiplexer. Each half of the F139 can be used as a
function generator providing all four minterms of two vari-
ables.
Features
s
Multifunction capability
s
Two completely independent 1-of-4 decoders
s
Active LOW mutually exclusive outputs
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Order Number
Package Number
Package Description
74F139SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F139SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F139PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
E
A
0
A
1
O
0
O
1
O
2
O
3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
H
L
H
L
H
H
L
L
H
H
H
L
H
L
H
H
H
H
H
L
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2
74F139
Unit Loading/Fan Out
Functional Description
The F139 is a high-speed dual 1-of-4 decoder/demulti-
plexer. The device has two independent decoders, each of
which accepts two binary weighted inputs (A
0
A
1
) and pro-
vides four mutually exclusive active LOW Outputs (O
0
O
3
).
Each decoder has an active LOW enable (E). When E is
HIGH all outputs are forced HIGH. The enable can be used
as the data input for a 4-output demultiplexer application.
Each half of the F139 generates all four minterms of two
variables. These four minterms are useful in some applica-
tions, replacing multiple gate functions as shown in
Figure 1, and thereby reducing the number of packages
required in a logic network.
FIGURE 1. Gate Functions (each half)
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
0
, A
1
Address Inputs
1.0/1.0
20
A/
-
0.6 mA
E
Enable Inputs (Active LOW)
1.0/1.0
20
A/
-
0.6 mA
O
0
O
3
Outputs (Active LOW)
50/33.3
-
1 mA/20 mA
3
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7
4F139
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
AC Electrical Characteristics
Storage Temperature
-
65
C to
+
150
C
Ambient Temperature under Bias
-
55
C to
+
125
C
Junction Temperature under Bias
-
55
C to
+
150
C
V
CC
Pin Potential to Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
-
0.5V to V
CC
3 STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min)
4000V
Free Air Ambient Temperature
0
C to
+
70
C
Supply Voltage
+
4.5V to
+
5.5V
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH Voltage
10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
5% V
CC
2.7
I
OH
=
-
1 mA
V
OL
Output LOW Voltage
10% V
CC
0.5
V
Min
I
OL
=
20 mA
I
IH
Input HIGH Current
5.0
A
Max
V
IN
=
2.7V
I
BVI
Input HIGH Current Breakdown Test
7.0
A
Max
V
IN
=
7.0V
I
CEX
Output HIGH Leakage Current
50
A
Max
V
OUT
=
V
CC
V
ID
Input Leakage Test
4.75
V
0.0
I
ID
=
1.9
A
All Other Pins Grounded
I
OD
Output Leakage Circuit Current
3.75
A
0.0
V
IOD
=
150 mV
All Other Pins Grounded
I
IL
Input LOW Current
-
0.6
mA
Max
V
IN
=
0.5V
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
CC
Power Supply Current
13
20
mA
Max
Symbol
Parameter
T
A
=
+
25
C
T
A
=
0
C to
+
70
C
Units
V
CC
=
+
5.0V
V
CC
=
+
5.0V
C
L
=
50 pF
C
L
=
50 pF
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.5
5.3
7.5
3.0
8.5
ns
t
PHL
A
0
or A
1
to O
n
4.0
6.1
8.0
4.0
9.0
t
PLH
Propagation Delay
3.5
5.4
7.0
3.5
8.0
ns
t
PHL
E
1
to O
n
3.0
4.7
6.5
3.0
7.5
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4
74F139
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
5
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7
4F139 D
u
a
l
1-of
-4 Decoder
/Demult
i
p
l
exer
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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