1999 Fairchild Semiconductor Corporation
DS009480
www.fairchildsemi.com
April 1988
Revised July 1999
7
4F148
8-Li
ne t
o
3-Li
ne Pr
ior
i
t
y
Enc
oder
74F148
8-Line to 3-Line Priority Encoder
General Description
The F148 provides three bits of binary coded output repre-
senting the position of the highest order active input, along
with an output indicating the presence of any active input. It
is easily expanded via input and output enables to provide
priority encoding over many bits.
Features
s
Encodes eight data lines in priority
s
Provides 3-bit binary priority code
s
Input enable capability
s
Signals when data is present on any input
s
Cascadable for priority encoding of n bits
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Order Number
Package Number
Package Description
74F148SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F148SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F148PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
EI
I
0
I
1
I
2
I
3
I
4
I
5
I
6
I
7
GS A
0
A
1
A
2
EO
H
X
X
X
X
X
X
X
X
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
X
X
X
X
X
X
X
L
L
L
L
L
H
L
X
X
X
X
X
X
L
H
L
H
L
L
H
L
X
X
X
X
X
L
H
H
L
L
H
L
H
L
X
X
X
X
L
H
H
H
L
H
H
L
H
L
X
X
X
L
H
H
H
H
L
L
L
H
H
L
X
X
L
H
H
H
H
H
L
H
L
H
H
L
X
L
H
H
H
H
H
H
L
L
H
H
H
L
L
H
H
H
H
H
H
H
L
H
H
H
H
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2
74F148
Unit Loading/Fan Out
Functional Description
The F148 8-input priority encoder accepts data from eight
active LOW inputs (I
0
I
7
) and provides a binary represen-
tation on the three active LOW outputs. A priority is
assigned to each input so that when two or more inputs are
simultaneously active, the input with the highest priority is
represented on the output, with input line 7 having the high-
est priority. A HIGH on the Enable Input (EI) will force all
outputs to the inactive (HIGH) state and allow new data to
settle without producing erroneous information at the out-
puts.A Group Signal output (GS) and Enable Output (EO)
are provided along with the three priority data outputs (A
2
,
A
1
, A
0
). GS is active LOW when any input is LOW: this
indicates when any input is active. EO is active LOW when
all inputs are HIGH. Using the Enable Output along with
the Enable Input allows cascading for priority encoding on
any number of input signals. Both EO and GS are in the
inactive HIGH state when the Enable Input is HIGH.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Application
16-Input Priority Encoder
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
I
0
Priority Input (Active LOW)
1.0/1.0
20
A/
-
0.6 mA
I
1
I
7
Priority Inputs (Active LOW)
1.0/2.0
20
A/
-
1.2 mA
EI
Enable Input (Active LOW)
1.0/1.0
20
A/
-
0.6 mA
EO
Enable Output (Active LOW)
50/33.3
-
1 mA/20 mA
GS
Group Signal Output (Active LOW)
50/33.3
-
1 mA/20 mA
A
0
A
2
Address Outputs (Active LOW)
50/33.3
-
1 mA/20 mA
3
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7
4F148
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature
-
65
C to
+
150
C
Ambient Temperature under Bias
-
55
C to
+
125
C
Junction Temperature under Bias
-
55
C to
+
150
C
V
CC
Pin Potential to Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
-
0.5V to V
CC
3-STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Free Air Ambient Temperature
0
C to
+
70
C
Supply Voltage
+
4.5V to
+
5.5V
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH
10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
Voltage
5% V
CC
2.7
I
OH
=
-
1 mA
V
OL
Output LOW
10% V
CC
0.5
V
Min
I
OL
=
20 mA
Voltage
I
IH
Input HIGH
5.0
A
Max
V
IN
=
2.7V
Current
I
BVI
Input HIGH Current
7.0
A
Max
V
IN
=
7.0V
Breakdown Test
I
CEX
Output High
50
A
Max
V
OUT
=
V
CC
Leakage Current
V
ID
Input Leakage
4.75
V
0.0
I
ID
=
1.9
A
Test
All Other Pins Grounded
I
OD
Output Leakage
3.75
A
0.0
V
IOD
=
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW
-
0.6
mA
Max
V
IN
=
0.5V
(I
0
, EI)
Current
-
1.2
mA
V
IN
=
0.5V
(I
1
I
7
)
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
CCH
Power Supply Current
35
mA
Max
V
O
=
HIGH
I
CCL
Power Supply Current
35
mA
Max
V
O
=
LOW
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4
74F148
AC Electrical Characteristics
Symbol
Parameter
T
A
=
+
25
C
T
A
=
0
C to
+
70
C
Units
V
CC
=
+
5.0V
V
CC
=
+
5.0V
C
L
=
50 pF
C
L
=
50 pF
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.0
7.0
9.0
3.0
10.0
ns
t
PHL
I
n
to A
n
3.0
8.0
10.5
3.0
12.0
t
PLH
Propagation Delay
2.5
5.0
6.5
2.5
7.5
ns
t
PHL
I
n
to EO
2.5
5.5
7.5
2.5
8.5
t
PLH
Propagation Delay
2.5
7.0
9.0
2.5
10.0
ns
t
PHL
I
n
to GS
2.5
6.0
8.0
2.5
9.0
t
PLH
Propagation Delay
2.5
6.5
8.5
2.5
9.5
ns
t
PHL
EI to A
n
2.5
6.0
8.0
2.5
9.0
t
PLH
Propagation Delay
2.5
5.0
7.0
2.5
8.0
ns
t
PHL
EI to GS
2.5
6.0
7.5
2.5
8.5
t
PLH
Propagation Delay
2.5
5.5
7.0
2.5
8.0
ns
t
PHL
EI to EO
3.0
8.0
10.5
3.0
12.0
5
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7
4F148
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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6
74F148 8-
Line to 3-
Line Pri
o
ri
ty Encoder
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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