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Электронный компонент: 74F157ASJ

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2000 Fairchild Semiconductor Corporation
DS009483
www.fairchildsemi.com
April 1988
Revised September 2000
7
4
F157A Quad
2-
Input
Mul
t
i
p
lex
e
r
74F157A
Quad 2-Input Multiplexer
General Description
The F157A is a high-speed quad 2-input multiplexer. Four
bits of data from two sources can be selected using the
common Select and Enable inputs. The four outputs
present the selected data in the true (non-inverted) form.
The F157A can also be used to generate any four of the 16
different functions to two variables.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number
Package Number
Package Description
74F157ASC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F157ASJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F157APC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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2
74F15
7A
Unit Loading/Fan Out
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Functional Description
The F157A is a quad 2-input multiplexer. It selects four bits
of data from two sources under the control of a common
Select input (S). The Enable input (E) is active LOW. When
E is HIGH, all of the outputs (Z) are forced LOW regardless
of all other inputs. The F157A is the logic implementation of
a 4-pole, 2-position switch where the position of the switch
is determined by the logic levels supplied to the Select
input. The logic equations for the outputs are shown below:
Z
n
=
E (I
1n
S
+
I
0n
S)
A common use of the F157A is the moving of data from two
groups of registers to four common output busses. The
particular register from which the data comes is determined
by the state of the Select input. A less obvious use is as a
function generator. The F157A can generate any four of
the 16 different functions of two variables with one variable
common. This is useful for implementing highly irregular
logic.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
I
0a
I
0d
Source 0 Data Inputs
1.0/1.0
20
A/
-
0.6 mA
I
1a
I
1d
Source 1 Data Inputs
1.0/1.0
20
A/
-
0.6 mA
E
Enable Input (Active LOW)
1.0/1.0
20
A/
-
0.6 mA
S
Select Input
1.0/1.0
20
A/
-
0.6 mA
Z
a
Z
d
Outputs
50/33.3
-
1 mA/20 mA
Inputs
Output
E
S
I
0
I
1
Z
H
X
X
X
L
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
3
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7
4
F157A
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
AC Electrical Characteristics
Storage Temperature
-
65
C to
+
150
C
Ambient Temperature under Bias
-
55
C to
+
125
C
Junction Temperature under Bias
-
55
C to
+
150
C
V
CC
Pin Potential to Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
-
0.5V to V
CC
3-STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min)
4000V
Free Air Ambient Temperature
0
C to
+
70
C
Supply Voltage
+
4.5V to
+
5.5V
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH
10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
Voltage
5% V
CC
2.7
I
OH
=
-
1 mA
V
OL
Output LOW Voltage
10% V
CC
0.5
V
Min
I
OL
=
20 mA
I
IH
Input HIGH
5.0
A
Max
V
IN
=
2.7V
Current
I
BVI
Input HIGH Current
7.0
A
Max
V
IN
=
7.0V
Breakdown Test
I
CEX
Output HIGH
50
A
Max
V
OUT
=
V
CC
Leakage Current
V
ID
Input Leakage
4.75
V
0.0
I
ID
=
1.9
A
Test
All Other Pins Grounded
I
OD
Output Leakage
3.75
A
0.0
V
IOD
=
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW Current
-
0.6
mA
Max
V
IN
=
0.5V
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
CCH
Power Supply Current
15
23
mA
Max
V
O
=
HIGH
I
CCL
Power Supply Current
15
23
mA
Max
V
O
=
LOW
Symbol
Parameter
T
A
=
+
25
C
T
A
=
-
55
C to
+
125
C
T
A
=
0
C to
+
70
C
Units
V
CC
=
+
5.0V
V
CC
=
+
5.0V
V
CC
=
+
5.0V
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
Min
Typ
Max
Min
Max
Min
Max
t
PLH
Propagation Delay
4.0
7.0
10.0
4.0
12.0
4.0
11.0
ns
t
PHL
S to Z
n
3.0
5.0
7.0
3.0
9.0
3.0
8.0
t
PLH
Propagation Delay
5.0
7.0
9.5
5.0
13.0
5.0
11.0
ns
t
PHL
E to Z
n
2.5
4.5
6.5
2.5
7.5
2.5
7.0
t
PLH
Propagation Delay
2.5
4.5
6.0
2.5
7.5
2.5
6.5
ns
t
PHL
I
n
to Z
n
2.5
4.0
5.5
1.5
7.5
2.0
7.0
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4
74F15
7A
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
5
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7
4
F157A
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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6
74F157
A
Quad 2-I
nput Mult
ipl
exer
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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