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Электронный компонент: 74F350PC

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1999 Fairchild Semiconductor Corporation
DS009518
www.fairchildsemi.com
April 1988
Revised August 1999
7
4F350 4-Bi
t Shif
ter

wi
th 3-ST
A
T
E
Out
puts
74F350
4-Bit Shifter with 3-STATE Outputs
General Description
The 74F350 is a specialized multiplexer that accepts a 4-bit
word and shifts it 0, 1, 2 or 3 places, as determined by two
Select (S
0
, S
1
) inputs. For expansion to longer words, three
linking inputs are provided for lower-order bits; thus two
packages can shift an 8-bit word, four packages a 16-bit
word, etc. Shifting by more than three places is accom-
plished by paralleling the 3-STATE outputs of different
packages and using the Output Enable (OE ) inputs as a
third Select level. With appropriate interconnections, the
74F350 can perform zero-backfill, sign-extend or end-
around (barrel) shift functions.
Features
s
Linking inputs for word expansion
s
3-STATE outputs for extending shift range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Order Number
Package Number
Package Description
74F350SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F350SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F350PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
OE
S
1
S
0
O
0
O
1
O
2
O
3
H
X
X
Z
Z
Z
Z
L
L
L
I
0
I
1
I
2
I
3
L
L
H
I
-
1
I
0
I
1
I
2
L
H
L
I
-
2
I
-
1
I
0
I
1
L
H
H
I
-
3
I
-
2
I
-
1
I
0
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2
74F350
Unit Loading/Fan Out
Functional Description
The 74F350 is operationally equivalent to a 4-input multi-
plexer with the inputs connected so that the select code
causes successive one-bit shifts of the data word. This
internal connection makes it possible to perform shifts of 0,
1, 2 or 3 places on words of any length.
A 4-bit data word is introduced at the I
n
inputs and is
shifted according to the code applied to the select inputs
S
0
, S
1
. Outputs O
0
O
3
are 3-STATE, controlled by an
active LOW output enable (OE). When OE is LOW, data
outputs will follow selected data inputs; when HIGH, the
data outputs will be forced to the high impedance state.
This feature allows shifters to be cascaded on the same
output lines or to a common bus. The shift function can be
logical, with zeros pulled in at either or both ends of the
shifting field; arithmetic, where the sign bit is repeated dur-
ing a shift down; or end around, where the data word forms
a continuous loop.
Logic Equations
O
0
=
S
0
S
1
I
0
+
S
0
S
1
I
-
1
+
S
0
S
1
I
-
2
+
S
0
S
1
I
-
3
O
1
=
S
0
S
1
I
1
+
S
0
S
1
I
0
+
S
0
S
1
I
-
1
+
S
0
S
1
I
-
2
O
2
=
S
0
S
1
I
2
+
S
0
S
1
I
1
+
S
0
S
1
I
0
+
S
0
S
1
I
-
1
O
3
=
S
0
S
1
I
3
+
S
0
S
1
I
2
+
S
0
S
1
I
1
+
S
0
S
1
I
0
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
S
0
, S
1
Select Inputs
1.0/2.0
20
A/
-
1.2 mA
I
-
3
I
3
Data Inputs
1.0/2.0
20
A/
-
1.2 mA
OE
Output Enable Input (Active LOW)
1.0/2.0
20
A/
-
1.2 mA
O
0
O
3
3-STATE Outputs
150/40 (33.3)
-
3 mA/24 mA (20 mA)
3
www.fairchildsemi.com
7
4F350
Applications
16-Bit Shift-Up 0 to 3 Places, Zero Backfill
Function Table
8-Bit End Around Shift 0 to 7 Places
Function Table
S
1
S
0
Shift Function
L
L
No Shift
L
H
Shift 1 Place
H
L
Shift 2 Places
H
H
Shift 3 Places
S
2
S
1
S
0
Shift Function
L
L
L
No Shift
L
L
H
Shift End Around 1
L
H
L
Shift End Around 2
L
H
H
Shift End Around 3
H
L
L
Shift End Around 4
H
L
H
Shift End Around 5
H
H
L
Shift End Around 6
H
H
H
Shift End Around 7
www.fairchildsemi.com
4
74F350
13-Bit Twos Complement Scaler
Function Table
S
1
S
0
Scale
L
L
8
1
/
8
L
H
4
1
/
4
H
L
2
H
H No Change
1
5
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7
4F350
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature
-
65
C to
+
150
C
Ambient Temperature under Bias
-
55
C to
+
125
C
Junction Temperature under Bias
-
55
C to
+
150
C
V
CC
Pin Potential to Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
-
0.5V to V
CC
3-STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Free Air Ambient Temperature
0
C to
+
70
C
Supply Voltage
+
4.5V to
+
5.5V
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH
10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
Voltage
10% V
CC
2.4
I
OH
=
-
3 mA
5% V
CC
2.7
I
OH
=
-
1 mA
10% V
CC
2.7
I
OH
=
-
3 mA
V
OL
Output LOW Voltage
10% V
CC
0.5
V
Min
I
OL
=
24 mA
I
IH
Input HIGH Current
5.0
A
Max
V
IN
=
2.7V
I
BVI
Input HIGH Current
7.0
A
Max
V
IN
=
7.0V
Breakdown Test
I
CEX
Output HIGH
50
A
Max
V
OUT
=
V
CC
Leakage Current
V
ID
Input Leakage
4.75
V
0.0
I
ID
=
1.9
A
Test
All Other Pins Grounded
I
OD
Output Leakage
3.75
A
0.0
V
IOD
=
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW Current
-
1.2
mA
Max
V
IN
=
0.5V
I
OZH
Output Leakage Current
50
A
Max
V
OUT
=
2.7V
I
OZL
Output Leakage Current
-
50
A
Max
V
OUT
=
0.5V
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
ZZ
Bus Drainage Test
500
A
0.0V
V
OUT
=
5.25V
I
CCH
Power Supply Current
34
42
mA
Max
V
O
=
HIGH
I
CCL
Power Supply Current
40
57
mA
Max
V
O
=
LOW
I
CCZ
Power Supply Current
40
57
mA
Max
V
O
=
HIGH Z