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Электронный компонент: 74F583

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April 1988
Revised March 1999
7
4F583 4-Bi
t BC
D Adder
1999 Fairchild Semiconductor Corporation
DS009570.prf
www.fairchildsemi.com
74F583
4-Bit BCD Adder
General Description
The 'F583 high-speed 4-bit, BCD full adder with internal
carry lookahead accepts two 4-bit decimal numbers (A
0
A
3
, B
0
B
3
) and a Carry Input (C
n
). It generates the decimal
sum outputs (S
0
S
3
), and a Carry Output (C
n
+
4
) if the sum
is greater than 9. The 'F583 is the functional equivalent of
the 82S83.
Features
s
Adds two decimal numbers
s
Full internal lookahead
s
Fast ripple carry for economical expansion
s
Sum output delay time 16.5 ns max
s
Ripple carry delay time 8.5 ns max
s
Input to ripple delay time 14.0 ns max
s
Supply current 60 mA max
Ordering Code:
Logic Symbols
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
Order Number
Package Number
Package Description
74F583SC
M16B
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F583PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74F
Pin
Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
A
0
A
3
A Operand Inputs
1.0/2.0
20
A/
-
1.2 mA
B
0
B
3
B Operand Inputs
1.0/2.0
20
A/
-
1.2 mA
C
n
Carry Input
1.0/1.0
20
A/
-
0.6 mA
S
0
S
3
Sum Outputs
50/33.3
-
1 mA/20 mA
C
n
+
4
Carry Output
50/33.3
-
1 mA/20 mA
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2
74F583
Functional Description
The 'F583 4-bit binary coded (BCD) full adder performs the
addition of two decimal numbers (A
0
A
3
, B
0
B
3
). The loo-
kahead generates the BCD carry terms internally, allowing
the 'F583 to then do BCD addition correctly. For BCD num-
bers 0 through 9 at A and B inputs, the BCD sum forms at
the output. In the addition of two BCD numbers totalling a
number greater than 9, a valid BCD number and a carry will
result.
For input values larger than 9, the number is converted
from binary to BCD. Binary to BCD conversion occurs by
grounding one set of inputs, A
n
or B
n
, and applying any 4-
bit binary number to the other set of inputs. If the input is
between 0 and 9, a BCD number occurs at the output. If
the binary input falls between 10 and 15, a carry term is
generated. Both the carry term and the sum are the BCD
equivalent of the binary input. Converting binary numbers
greater than 16 may be achieved through cascading
'F583s.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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7
4F583
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
AC Electrical Characteristics
Storage Temperature
-
65
C to
+
150
C
Ambient Temperature under Bias
-
55
C to
+
125
C
Junction Temperature under Bias
-
55
C to
+
175
C
Plastic
-
55
C to
+
150
C
V
CC
Pin Potential to
Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
-
0.5V to V
CC
3-STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Free Air Ambient Temperature
Commercial
0
C to
+
70
C
Supply Voltage
Commercial
+
4.5V to
+
5.5V
Symbol
Parameter
74F
Units
V
CC
Conditions
Min
Typ
Max
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH
74F 10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
Voltage
74F 5% V
CC
2.7
I
OH
=
-
1 mA
V
OL
Output LOW
74F 10% V
CC
0.5
V
Min
I
OL
=
20 mA
Voltage
I
IH
Input HIGH Current
20
A
Max
V
IN
=
2.7V
I
BVI
Input HIGH Current
100
A
Max
V
IN
=
7.0V
Breakdown Test
I
IL
Input LOW Current
-
0.6
mA
Max
V
IN
=
0.5V
(C
n
)
-
1.2
V
IN
=
0.5V
(A
n
, B
n
)
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
CEX
Output HIGH Leakage Current
250
A
Max
V
OUT
=
V
CC
I
CCL
Power Supply Current
40
60
mA
Max
V
O
=
LOW
74F
74F
T
A
=
+
25
C
T
A
, V
CC
=
Com
Symbol
Parameter
V
CC
=
+
5.0V
C
L
=
50 pF
Units
C
L
=
50 pF
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
2.5
13.0
16.5
2.5
17.5
ns
t
PHL
A
n
or B
n
to S
n
2.5
11.0
14.0
2.5
15.0
t
PLH
Propagation Delay
2.5
6.5
8.5
2.5
9.5
ns
t
PHL
C
n
to C
n
+
4
2.5
5.0
6.5
2.5
7.5
t
PLH
Propagation Delay
4.0
11.0
14.0
4.0
15.0
ns
t
PHL
A
n
or B
n
to C
n
+
4
4.0
8.0
10.5
4.0
11.5
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4
74F583
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M16B
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
7
4F583 4-Bi
t BC
D Adder
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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