2005 Fairchild Semiconductor Corporation
DS012000
www.fairchildsemi.com
February 1994
Revised May 2005
7
4LCX16244 Low
V
o
lt
ag
e
16-
Bit
Buf
f
er
/Li
ne Driv
er w
i
th
5V T
o
ler
ant Input
s
and Output
s
74LCX16244
Low Voltage 16-Bit Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
The LCX16244 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCX16244 is designed for low voltage (2.5 or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V to 3.6V V
CC
specifications provided
s
4.5 ns t
PD
max, 10
P
A I
CCQ
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
r
24 mA output drive (V
CC
3.0V)
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Note 2: Ordering code "G" indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
GTO
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74LCX16244G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LCX16244MEA
(Note 3)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCX16244MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
3
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7
4LCX16244
Functional Description
The LCX16244 contains sixteen non-inverting buffers with
3-STATE standard outputs. The device is nibble (4 bits)
controlled with each nibble functioning identically, but inde-
pendent of the other. The control pins can be shorted
together to obtain full 16-bit operation. The 3-STATE out-
puts are controlled by an Output Enable (OE
n
) input for
each nibble. When OE
n
is LOW, the outputs are in 2-state
mode. When OE
n
is HIGH, the outputs are in the high
impedance mode, but this does not interfere with entering
new data into the inputs.
Logic Diagram
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4
74LCX16244
Absolute Maximum Ratings
(Note 4)
Recommended Operating Conditions
(Note 6)
Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recom-
mended Operating Conditions" table will define the conditions for actual device operation.
Note 5: I
O
Absolute Maximum Rating must be observed.
Note 6: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
0.5 to
7.0
V
V
I
DC Input Voltage
0.5 to
7.0
V
V
O
DC Output Voltage
0.5 to
7.0
Output in 3-STATE
V
0.5 to V
CC
0.5
Output in HIGH or LOW State (Note 5)
I
IK
DC Input Diode Current
50
V
I
GND
mA
I
OK
DC Output Diode Current
50
V
O
GND
mA
50
V
O
!
V
CC
I
O
DC Output Source/Sink Current
r
50
mA
I
CC
DC Supply Current per Supply Pin
r
100
mA
I
GND
DC Ground Current per Ground Pin
r
100
mA
T
STG
Storage Temperature
65 to
150
q
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
Operating
2.0
3.6
V
Data Retention
1.5
3.6
V
I
Input Voltage
0
5.5
V
V
O
Output Voltage
HIGH or LOW State
0
V
CC
V
3-STATE
0
5.5
I
OH
/I
OL
Output Current
V
CC
3.0V
3.6V
r
24
mA
V
CC
2.7V
3.0V
r
12
V
CC
2.3V
2.7V
r
8
T
A
Free-Air Operating Temperature
40
85
q
C
'
t/
'
V
Input Edge Rate, V
IN
0.8V2.0V, V
CC
3.0V
0
10
ns/V
Symbol
Parameter
Conditions
V
CC
T
A
40
q
C to
85
q
C
Units
(V)
Min
Max
V
IH
HIGH Level Input Voltage
2.3
2.7
1.7
V
2.7
3.6
2.0
V
IL
LOW Level Input Voltage
2.3
2.7
0.7
V
2.7
3.6
0.8
V
OH
HIGH Level Output Voltage
I
OH
100
P
A
2.3
3.6
V
CC
0.2
V
I
OH
8 mA
2.3
1.8
I
OH
12 mA
2.7
2.2
I
OH
18 mA
3.0
2.4
I
OH
24 mA
3.0
2.2
V
OL
LOW Level Output Voltage
I
OL
100
P
A
2.3
3.6
0.2
V
I
OL
8 mA
2.3
0.6
I
OL
12 mA
2.7
0.4
I
OL
16 mA
3.0
0.4
I
OL
24 mA
3.0
0.55
I
I
Input Leakage Current
0
d
V
I
d
5.5V
2.3
3.6
r
5.0
P
A
I
OZ
3-STATE Output Leakage
0
d
V
O
d
5.5V
2.3
3.6
r
5.0
P
A
V
I
V
IH
or V
IL
I
OFF
Power-Off Leakage Current
V
I
or V
O
5.5V
0
10
P
A
5
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7
4LCX16244
DC Electrical Characteristics
(Continued)
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Dynamic Switching Characteristics
Capacitance
Symbol
Parameter
Conditions
V
CC
T
A
40
q
C to
85
q
C
Units
(V)
Min
Max
I
CC
Quiescent Supply Current
V
I
V
CC
or GND
2.3
3.6
20
P
A
3.6V
d
V
I
, V
O
d
5.5V (Note 7)
2.3
3.6
r
20
'
I
CC
Increase in I
CC
per Input
V
IH
V
CC
0.6V
2.3
3.6
500
P
A
Symbol
Parameter
T
A
40
q
C to
85
q
C, R
L
500
:
Units
V
CC
3.3V
r
0.3V
V
CC
2.7V
V
CC
2.5
r
0.2V
C
L
50 pF
C
L
50 pF
C
L
30 pF
Min
Max
Min
Max
Min
Max
t
PHL
Propagation Delay
1.0
4.5
1.0
5.2
1.0
5.4
ns
t
PLH
Data to Output
1.0
4.5
1.0
5.2
1.0
5.4
t
PZL
Output Enable Time
1.0
5.5
1.0
6.3
1.0
7.2
ns
t
PZH
1.0
5.5
1.0
6.3
1.0
7.2
t
PLZ
Output Disable Time
1.0
5.4
1.0
5.7
1.0
6.5
ns
t
PHZ
1.0
5.4
1.0
5.7
1.0
6.5
t
OSHL
Output to Output Skew (Note 8)
1.0
ns
t
OSLH
1.0
Symbol
Parameter
Conditions
V
CC
T
A
25
q
C
Unit
(V)
Typical
V
OLP
Quiet Output Dynamic Peak V
OL
C
L
50 pF, V
IH
3.3V, V
IL
0V
3.3
0.8
V
C
L
30pF, V
IH
2.5V, V
IL
0V
2.5
0.6
V
OLV
Quiet Output Dynamic Valley V
OL
C
L
50 pF, V
IH
3.3V, V
IL
0V
3.3
0.8
V
C
L
30pF, V
IH
2.5V, V
IL
0V
2.5
0.6
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
Open, V
I
0V or V
CC
7
pF
C
OUT
Output Capacitance
V
CC
3.3V, V
I
0V or V
CC
8
pF
C
PD
Power Dissipation Capacitance
V
CC
3.3V, V
I
0V or V
CC
, f
10 MHz
20
pF
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