1999 Fairchild Semiconductor Corporation
DS500212
www.fairchildsemi.com
July 1999
Revised August 1999
7
4
L
V
T2
240
74L
VTH2240 Low
V
o
lt
age Inve
rti
ng O
c
tal
Buf
f
er
/Li
ne D
r
ive
r
w
i
th 3-
S
T
A
T
E O
u
t
puts
74LVT2240 74LVTH2240
Low Voltage Inverting Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVT2240 and LVTH2240 are inverting octal buffers
and line drivers designed to be employed as memory
address drivers, clock drivers and bus oriented transmitters
or receivers which provides improved PC board density.
The equivalent 25
-Series resistors helps reduce output
overshoot and undershoot.
The LVTH2240 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These inverting octal buffers and line drivers are designed
for low-voltage (3.3V) V
CC
applications, but with the capa-
bility to provide a TTL interface to a 5V environment. The
LVT2240 and LVTH2240 are fabricated with an advanced
BiCMOS technology to achieve high speed operation simi-
lar to 5V ABT while maintaining low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Equivalent 25
-Series resistors on outputs
s
Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH2240), also
available without bushold feature (74LVT2240).
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
Outputs source/sink
-
12 mA/
+
12 mA
s
Latch-up performance exceeds 500 mA
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Order Number
Package Number
Package Description
74LVT2240WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVT2240SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT2240MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH2240WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVTH2240SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH2240MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
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2
74L
VT2240
74L
VTH2240
Pin Descriptions
Truth Tables
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Pin Names
Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
I
7
Inputs
O
0
O
7
Outputs
Inputs
Outputs
(Pins 12, 14, 16, 18)
OE
1
I
n
L
L
H
L
H
L
H
X
Z
Inputs
Outputs
(Pins 3, 5, 7, 9)
OE
2
I
n
L
L
H
L
H
L
H
X
Z
3
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7
4
L
V
T2
240
74L
VTH2240
Absolute Maximum Ratings
(Note 1)
Recommended Operating Conditions
Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 2: I
O
Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
-
0.5 to
+
4.6
V
V
I
DC Input Voltage
-
0.5 to
+
7.0
V
V
O
DC Output Voltage
-
0.5 to
+
7.0
Output in 3-STATE
V
-
0.5 to
+
7.0
Output in HIGH or LOW State (Note 2)
V
I
IK
DC Input Diode Current
-
50
V
I
<
GND
mA
I
OK
DC Output Diode Current
-
50
V
O
<
GND
mA
I
O
DC Output Current
64
V
O
>
V
CC
Output at HIGH State
mA
128
V
O
>
V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin
64
mA
I
GND
DC Ground Current per Ground Pin
128
mA
T
STG
Storage Temperature
-
65 to
+
150
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
2.7
3.6
V
V
I
Input Voltage
0
5.5
V
I
OH
HIGH-Level Output Current
-
12
mA
I
OL
LOW-Level Output Current
12
T
A
Free-Air Operating Temperature
-
40
85
C
t/
V
Input Edge Rate, V
IN
=
0.8V2.0V, V
CC
=
3.0V
0
10
ns/V
Symbol
Parameter
V
CC
(V)
T
A
=-
40
C to
+
85
C
Units
Conditions
Min
Typ
Max
(Note 3)
V
IK
Input Clamp Diode Voltage
2.7
-
1.2
V
I
I
=
-
18 mA
V
IH
Input HIGH Voltage
2.73.6
2.0
V
V
O
0.1V or
V
O
V
CC
-
0.1V
V
IL
Input LOW Voltage
2.73.6
0.8
V
OH
Output HIGH Voltage
2.73.6
V
CC
-
0.2
V
I
OH
=
-
100
A
3.0
2.0
V
I
OH
=
-
12 mA
V
OL
Output LOW Voltage
2.7
0.2
V
I
OL
=
100
A
3.0
0.8
V
I
OL
=
12 mA
I
I(HOLD)
(Note 4)
Bushold Input Minimum Drive
3.0
75
A
V
I
=
0.8V
-
75
A
V
I
=
2.0V
I
I(OD)
(Note 4)
Bushold Input Over-Drive
Current to Change State
3.0
500
A
(Note 5)
-
500
A
(Note 6)
I
I
Input Current
3.6
10
A
V
I
=
5.5V
Control Pins
3.6
1
A
V
I
=
0V or V
CC
Data Pins
3.6
-
5
A
V
I
=
0V
1
A
V
I
=
V
CC
I
OFF
Power Off Leakage Current
0
100
A
0V
V
I
or V
O
5.5V
I
PU/PD
Power up/down 3-STATE
01.5V
100
A
V
O
=
0.5V to 3.0V
Output Current
V
I
=
GND or V
CC
I
OZL
3-STATE Output Leakage Current
3.6
-
5
A
V
O
=
0.5V
I
OZH
3-STATE Output Leakage Current
3.6
5
A
V
O
=
3.0V
I
OZH
+
3-STATE Output Leakage Current
3.6
10
A
V
CC
<
V
O
5.5V
I
CCH
Power Supply Current
3.6
0.19
mA
Outputs HIGH
I
CCL
Power Supply Current
3.6
5
mA
Outputs LOW
I
CCZ
Power Supply Current
3.6
0.19
mA
Outputs Disabled
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4
74L
VT2240
74L
VTH2240
DC Electrical Characteristics
(Continued)
Note 3: All typical values are at V
CC
=
3.3V, T
A
=
25
C.
Note 4: Applies to bushold versions only (74LVTH2240).
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7: This is the increase in supply current for each, input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
(Note 8)
Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested.
Note 9: Max number of outputs defined as (n). n
-
1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Note 10: All typical values are at V
CC
=
3.3V, T
A
=
25
C.
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance
(Note 12)
Note 12: Capacitance is measured at frequency f
=
1 MHz, per MIL-STD-883B, Method 3012.
Symbol
Parameter
V
CC
(V)
T
A
=-
40
C to
+
85
C
Units
Conditions
Min
Typ
Max
(Note 3)
I
CCZ
+
Power Supply Current
3.6
0.19
mA
V
CC
V
O
5.5V,
Outputs Disabled
I
CC
Increase in Power Supply Current
3.6
0.2
mA
One Input at V
CC
-
0.6V
(Note 7)
Other Inputs at V
CC
or GND
Symbol
Parameter
V
CC
(V)
T
A
=
25
C
Units
Conditions
C
L
=
50 pF,
R
L
=
500
Min
Typ
Max
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.8
V
(Note 9)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
-
0.8
V
Symbol
Parameter
T
A
=
-
40
C to
+
85
C
Units
C
L
=
50 pF, R
L
=
500
V
CC
=
3.3V
0.3V
V
CC
=
2.7V
Min
Typ
Max
Min
Max
(Note 10)
t
PLH
Propagation Delay Data to Output
1.0
4.0
1.0
4.8
ns
t
PHL
1.0
4.1
1.0
4.4
t
PZH
Output Enable Time
1.0
5.0
1.0
6.0
ns
t
PZL
1.1
5.0
1.1
5.6
t
PHZ
Output Disable Time
1.9
4.8
1.9
5.5
ns
t
PLZ
1.8
4.5
1.8
4.5
t
OSHL
Output to Output Skew
1.0
1.0
ns
t
OSLH
(Note 11)
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
=
0V, V
I
=
0V or V
CC
3
pF
C
OUT
Output Capacitance
V
CC
=
3.0V, V
O
=
0V or V
CC
6
pF
5
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7
4
L
V
T2
240
74L
VTH2240
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
7
4
L
V
T2
240
74L
VTH2240 Low
V
o
lt
age Inve
rti
ng O
c
tal
Buf
f
er
/Li
ne D
r
ive
r
wi
th 3-
S
T
A
T
E O
u
t
puts
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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