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Электронный компонент: 74LVTH2245

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2005 Fairchild Semiconductor Corporation
DS012173
www.fairchildsemi.com
November 1999
Revised March 2005
7
4
L
V
T2
245
74L
VTH2245
Low V
o
lt
age Oct
a
l
Bi
di
rect
ional
T
r
anscei
ver
wit
h
3
-
ST
A
T
E I
nput
s/Out
put
s
and 2
5
:
Ser
i
es
Resi
stor
s i
n

the
B Por
t

O
u
tput
s
74LVT2245 74LVTH2245
Low Voltage Octal Bidirectional Transceiver with
3-STATE Inputs/Outputs and 25
:
Series Resistors
in the B Port Outputs
General Description
The LVT2245 and LVTH2245 contain eight non-inverting
bidirectional buffers with 3-STATE outputs and are
intended for bus-oriented applications. The Transmit/
Receive (T/R) input determines the direction of data flow
through the bidirectional transceiver. Transmit (active-
HIGH) enables data from A Ports to B Ports; Receive
(active-LOW) enables data from B Ports to A Ports. The
Output Enable input, when HIGH, disables both A and B
Ports by placing them in a high impedance state. The
equivalent 25
:
-series resistor in the B Port helps reduce
output overshoot and undershoot.
The LVTH2245 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These transceivers are designed for low voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT2245 and
LVTH2245 are fabricated with an advanced BiCMOS tech-
nology to achieve high speed operation similar to 5V ABT
while maintaining low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Equivalent 25
:
series resistor on B Port outputs
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH2245),
also available without bushold feature (74LVT2245)
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
Outputs source/sink
12 mA/
12 mA on B Port,
32 mA/
64 mA on A Port
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
!
2000V
Machine model
!
200V
Charged-device model
!
1000V
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: "_NL" indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Order Number
Package
Package Description
Number
74LVT2245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVT2245SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT2245MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LVT2245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVT2245MTCX_NL
(Note 1)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LVTH2245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVTH2245SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH2245MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LVTH2245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH2245MTCX_NL
(Note 1)
MTC20
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
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2
74L
VT2245

74L
VTH2245
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Truth Table
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial
Pin Names
Description
OE
Output Enable Input
T/R
Transmit/Receive Input
A
0
A
7
Side A Inputs or 3-STATE Outputs
B
0
B
7
Side B Inputs or 3-STATE Outputs
Inputs
Outputs
OE
T/R
L
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
HIGH-Z State
3
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7
4
L
V
T2
245

74L
VTH2245
Absolute Maximum Ratings
(Note 2)
Recommended Operating Conditions
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: I
O
Absolute Maximum Rating must be observed.
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
0.5 to
4.6
V
V
I
DC Input Voltage
0.5 to
7.0
V
V
O
Output Voltage
0.5 to
7.0
Output in 3-STATE
V
0.5 to
7.0
Output in HIGH or LOW State (Note 3)
I
IK
DC Input Diode Current
50
V
I
GND
mA
I
OK
DC Output Diode Current
50
V
O
GND
mA
I
O
DC Output Current
64
V
O
!
V
CC
Output at HIGH State
mA
128
V
O
!
V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin
r
64
mA
I
GND
DC Ground Current per Ground Pin
r
128
mA
T
STG
Storage Temperature
65 to
150
q
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
2.7
3.6
V
V
I
Input Voltage
0
5.5
V
I
OH
HIGH-Level Output Current
A Port
32
mA
B Port
12
I
OL
LOW-Level Output Current
A Port
64
mA
B Port
12
T
A
Free Air Operating Temperature
40
85
q
C
'
t/
'
V
Input Edge Rate, V
IN
0.8V2.0V, V
CC
3.0V
0
10
ns/V
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4
74L
VT2245

74L
VTH2245
DC Electrical Characteristics
Note 4: Applies to Bushold versions only (74LVTH2245).
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
(Note 8)
Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested.
Note 9: Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. Output under test held LOW.
Symbol
Parameter
V
CC
T
A
40
q
C to
85
q
C
Units
Conditions
(V)
Min
Max
V
IK
Input Clamp Diode Voltage
2.7
1.2
V
I
I
18 mA
V
IH
Input HIGH Voltage
2.73.6
2.0
V
V
O
d
0.1V or
V
IL
Input LOW Voltage
2.73.6
0.8
V
V
O
t
V
CC
0.1V
V
OH
Output HIGH Voltage
A Port
2.7
2.4
V
I
OH
8 mA
3.0
2.0
I
OH
32 mA
B Port
3.0
2.0
V
I
OH
12 mA
2.73.6
V
CC
0.2
V
I
OH
100
P
A
V
OL
Output LOW Voltage
A Port
2.7
0.5
V
I
OL
24 mA
3.0
0.4
I
OL
16 mA
3.0
0.5
I
OL
32 mA
3.0
0.55
I
OL
64 mA
B Port
3.0
0.8
V
I
OL
12 mA
2.7
0.2
V
I
OL
100
P
A
I
I(HOLD)
Bushold Input Minimum Drive
3.0
75
P
A
V
I
0.8V
(Note 4)
75
V
I
2.0V
I
I(OD)
Bushold Input Over-Drive
3.0
500
P
A
(Note 5)
(Note 4)
Current to Change State
500
(Note 6)
I
I
Input Current
3.6
10
P
A
V
I
5.5V
Control Pins
3.6
r
1
V
I
0V or V
CC
Data Pins
3.6
5
V
I
0V
1
V
I
V
CC
I
OFF
Power Off Leakage Current
0
r
100
P
A
0V
d
V
I
or V
O
d
5.5V
I
PU/PD
Power Up/Down
01.5V
r
100
P
A
V
O
0.5V to 3.0V
3-STATE Current
V
I
GND or V
CC
I
OZL
3-STATE Output Leakage Current
3.6
5
P
A
V
O
0.5V
I
OZL
(Note 4)
3-STATE Output Leakage Current
3.6
5
P
A
V
O
0.0V
I
OZH
3-STATE Output Leakage Current
3.6
5
P
A
V
O
3.0V
I
OZH
(Note 4)
3-STATE Output Leakage Current
3.6
5
P
A
V
O
3.6V
I
OZH
3-STATE Output Leakage Current
3.6
10
P
A
V
CC
V
O
d
5.5V
I
CCH
Power Supply Current
3.6
0.19
mA
Outputs High
I
CCL
Power Supply Current
3.6
5
mA
Outputs Low
I
CCZ
Power Supply Current
3.6
0.19
mA
Outputs Disabled
I
CCZ
Power Supply Current
3.6
0.19
mA
V
CC
d
V
O
d
5.5V,
Outputs Disabled
'
I
CC
Increase in Power Supply Current
3.6
0.2
mA
One Input at V
CC
0.6V
(Note 7)
Other Inputs at V
CC
or GND
Symbol
Parameter
V
CC
T
A
25
q
C
Units
Conditions
(V)
Min
Typ
Max
C
L
50 pF, R
L
500
:
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.8
V
(Note 9)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
0.8
V
(Note 9)
5
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7
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T2
245

74L
VTH2245
AC Electrical Characteristics
Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance
(Note 11)
Note 11: Capacitance is measured at frequency f
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
T
A
40
q
C to
85
q
C
Units
C
L
50 pF, R
L
500
:
V
CC
3.3V
r
0.3V
V
CC
2.7V
Min
Max
Min
Max
t
PLH
Propagation Delay Data to B Port Output
1.2
4.4
1.2
5.1
ns
t
PHL
1.2
4.4
1.2
5.1
t
PLH
Propagation Delay Data to A Port Output
1.2
3.6
1.2
4.0
ns
t
PHL
1.2
3.5
1.2
4.0
t
PZH
Output Enable Time for B Port Output
1.3
6.2
1.3
7.3
ns
t
PZL
1.7
6.2
1.7
7.3
t
PZH
Output Enable Time for A Port Output
1.3
5.5
1.3
7.1
ns
t
PZL
1.7
5.7
1.7
6.7
t
PHZ
Output Disable Time for B Port Output
2.0
5.9
2.0
6.5
ns
t
PLZ
2.0
5.4
2.0
5.7
t
PHZ
Output Disable Time for A Port Output
2.0
5.9
2.0
6.5
ns
t
PLZ
2.0
5.0
2.0
5.1
t
OSHL
A Port Output to Output Skew
1.0
1.0
ns
t
OSLH
(Note 10)
t
OSHL
B Port Output to Output Skew
1.0
1.0
ns
t
OSLH
(Note 10)
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
0V, V
I
0V or V
CC
4
pF
C
I/O
Input/Output Capacitance
V
CC
3.0V, V
O
0V or V
CC
8
pF