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Электронный компонент: 74LVTH32244

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Preliminary
2001 Fairchild Semiconductor Corporation
DS500434
www.fairchildsemi.com
January 2001
Revised August 2001
7
4
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74L
VTH32244
Low V
o
l
t
age
32-
Bit
Buf
f
er
/Li
n
e Dr
iver
wi
th
3-ST
A
T
E Out
puts
(
P
r
e
l
i
minar
y
)
74LVT32244 74LVTH32244
Low Voltage 32-Bit Buffer/Line Driver
with 3-STATE Outputs (Preliminary)
General Description
The LVT32244 and LVTH32244 contain thirty-two non-
inverting buffers with 3-STATE outputs designed to be
employed as a memory and address driver, clock driver, or
bus oriented transmitter/receiver. The device is nibble con-
trolled. Individual 3-STATE control inputs can be shorted
together for 8-bit, 16-bit, or 32-bit operation.
The LVTH32244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers and line drivers are designed for low-voltage
(3.3V) V
CC
applications, but with the capability to provide a
TTL interface to a 5V environment. The LVT32244 and
LVTH32244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32244),
also available without bushold feature (74LVT32244).
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
Outputs source/sink
-
32 mA/
+
64 mA
s
ESD performance:
Human-body model
>
2000V
Machine model
>
200V
Charged-device model
>
1000V
s
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
(Preliminary)
Ordering Code:
Note 1: BGA package available in Tape and Reel only.
Logic Symbol
Order Number
Package Number
Package Description
74LVT32244GX
(Note 1)
BGA96A
(Preliminary)
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
74LVTH32244GX
(Note 1)
BGA96A
(Preliminary)
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
Preliminary
www.fairchildsemi.com
2
74L
VT32244

74L
VTH32244
Connection Diagram
(Top Thru View)
Pin Descriptions
Pin Assignments for FBGA
Truth Tables
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial (HIGH or LOW, inputs may not float)
Z
=
High Impedance
Pin Names
Description
OE
n
Output Enable Input (Active LOW)
I
0
I
31
Inputs
O
0
O
31
Outputs
1
2
3
4
5
6
A
O
1
O
0
OE
1
OE
2
I
0
I
1
B
O
3
O
2
GND
GND
I
2
I
3
C
O
5
O
4
V
CC1
V
CC1
I
4
I
5
D
O
7
O
6
GND
GND
I
6
I
7
E
O
9
O
8
GND
GND
I
8
I
9
F
O
11
O
10
V
CC1
V
CC1
I
10
I
11
G
O
13
O
12
GND
GND
I
12
I
13
H
O
14
O
15
OE
4
OE
3
I
15
I
14
J
O
17
O
16
OE
5
OE
6
I
16
I
17
K
O
19
O
18
GND
GND
I
18
I
19
L
O
21
O
20
V
CC2
V
CC2
I
20
I
21
M
O
23
O
22
GND
GND
I
22
I
23
N
O
25
O
24
GND
GND
I
24
I
25
P
O
27
O
26
V
CC2
V
CC2
I
26
I
27
R
O
29
O
28
GND
GND
I
28
I
29
T
O
30
O
31
OE
8
OE
7
I
31
I
30
Inputs
Outputs
OE
1
I
0
-I
3
O
0
-O
3
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
2
I
4
-I
7
O
4
-O
7
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
3
I
8
-I
11
O
8
O
11
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
4
I
12
-I
15
O
12
-O
15
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
5
I
16
-I
19
O
16
-O
19
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
6
I
20
-I
23
O
20
-O
23
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
7
I
24
-I
27
O
24
-O
27
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
8
I
28
-I
31
O
28
-O
31
L
L
L
L
H
H
H
X
Z
Preliminary
3
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74L
VTH32244
Functional Description
The 74LVT32244 and 74LVTH32244 contain thirty-two
non-inverting buffers with 3-STATE outputs. The device is
nibble (4 bits) controlled with each nibble functioning identi-
cally, but independent of the other. The control pins can be
shorted together to obtain full 32-bit operation. The
3-STATE outputs are controlled by an Output Enable (OE
n
)
input. When OE
n
is LOW, the outputs are in the 2-state
mode. When OE
n
is HIGH, the standard outputs are in the
high impedance mode but this does not interfere with
entering new data into the inputs.
Logic Diagrams
Byte 1
Byte 2
Byte 3
Byte 4
V
CC1
is associated with Bytes 1 and 2.
V
CC2
is associated with Bytes 3 and 4.
Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Preliminary
www.fairchildsemi.com
4
74L
VT32244

74L
VTH32244
Absolute Maximum Ratings
(Note 2)
Recommended Operating Conditions
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: I
O
Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
-
0.5 to
+
4.6
V
V
I
DC Input Voltage
-
0.5 to
+
7.0
V
V
O
Output Voltage
-
0.5 to
+
7.0
Output in 3-STATE
V
-
0.5 to
+
7.0
Output in High or Low State (Note 3)
I
IK
DC Input Diode Current
-
50
V
I
<
GND
mA
I
OK
DC Output Diode Current
-
50
V
O
<
GND
mA
I
O
DC Output Current
64
V
O
>
V
CC
Output at HIGH State
mA
128
V
O
>
V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin
64
mA
I
GND
DC Ground Current per Ground Pin
128
mA
T
STG
Storage Temperature
-
65 to
+
150
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
2.7
3.6
V
V
I
Input Voltage
0
5.5
V
I
OH
High-Level Output Current
-
32
mA
I
OL
Low-Level Output Current
64
mA
T
A
Free Air Operating Temperature
-
40
+
85
C
t/
V
Input Edge Rate, V
IN
=
0.8V2.0V, V
CC
=
3.0V
0
10
ns/V
Symbol
Parameter
V
CC
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Min
Max
V
IK
Input Clamp Diode Voltage
2.7
-
1.2
V
I
I
=
-
18 mA
V
IH
Input HIGH Voltage
2.73.6
2.0
V
V
O
0.1V or
V
IL
Input LOW Voltage
2.73.6
0.8
V
V
O
V
CC
-
0.1V
V
OH
Output HIGH Voltage
2.73.6
V
CC
-
0.2
V
I
OH
=
-
100
A
2.7
2.4
I
OH
=
-
8 mA
3.0
2.0
I
OH
=
-
32 mA
V
OL
Output LOW Voltage
2.7
0.2
V
I
OL
=
100
A
2.7
0.5
I
OL
=
24 mA
3.0
0.4
I
OL
=
16 mA
3.0
0.5
I
OL
=
32 mA
3.0
0.55
I
OL
=
64 mA
I
I(HOLD)
Bushold Input Minimum Drive
3.0
75
A
V
I
=
0.8V
(Note 4)
-
75
V
I
=
2.0V
I
I(OD)
Bushold Input Over-Drive
3.0
500
A
(Note 5)
(Note 4)
Current to Change State
-
500
(Note 6)
I
I
Input Current
3.6
10
A
V
I
=
5.5V
Control Pins
3.6
1
V
I
=
0V or V
CC
Data Pins
3.6
-
5
V
I
=
0V
1
V
I
=
V
CC
I
OFF
Power Off Leakage Current
0
100
A
0V
V
I
or V
O
5.5V
I
PU/PD
Power Up/Down
0 1.5V
100
A
V
O
=
0.5V to 3.0V
3-STATE Current
V
I
=
GND or V
CC
I
OZL
3-STATE Output Leakage Current
3.6
-
5
A
V
O
=
0.5V
I
OZH
3-STATE Output Leakage Current
3.6
5
A
V
O
=
3.0V
I
OZH
+
3-STATE Output Leakage Current
3.6
10
A
V
CC
<
V
O
5.5V
Preliminary
5
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74L
VTH32244
DC Electrical Characteristics
(Continued)
Note 4: Applies to bushold versions only (LVTH32244).
Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
(Note 8)
Note 8: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 9: Max number of outputs defined as (n). n
-
1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Capacitance
(Note 10)
Note 10: Capacitance is measured at frequency f
=
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
V
CC
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Min
Max
I
CCH
Power Supply Current
V
CC1
or V
CC2
3.6
0.19
mA
Outputs High
I
CCL
Power Supply Current
V
CC1
or V
CC2
3.6
5.0
mA
Outputs Low
I
CCZ
Power Supply Current
V
CC1
or V
CC2
3.6
0.19
mA
Outputs Disabled
I
CCZ
+
Power Supply Current
V
CC1
or V
CC2
3.6
0.19
mA
V
CC
V
O
5.5V,
Outputs Disabled
I
CC
Increase in Power Supply Current
3.6
0.2
mA
One Input at V
CC
-
0.6V
(Note 7)
V
CC1
or V
CC2
Other Inputs at V
CC
or GND
Symbol
Parameter
V
CC
T
A
=
25
C
Units
Conditions
(V)
Min
Typ
Max
C
L
=
50 pF, R
L
=
500
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.8
V
(Note 9)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
-
0.8
V
(Note 9)
Symbol
Parameter
T
A
=
-
40
C to
+
85
C
Units
C
L
=
50 pF, R
L
=
500
V
CC
=
3.3V
0.3V
V
CC
=
2.7V
Min
Max
Min
Max
t
PLH
Propagation Delay Data to Output
1.2
3.5
1.2
3.9
ns
t
PHL
1.2
3.5
1.2
3.9
t
PZH
Output Enable Time
1.2
4.0
1.2
5.0
ns
t
PZL
1.2
5.0
1.2
6.5
t
PHZ
Output Disable Time
2.0
4.7
2.0
5.2
ns
t
PLZ
1.5
4.2
1.5
4.4
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
=
0V, V
I
=
0V or V
CC
4
pF
C
OUT
Output Capacitance
V
CC
=
3.0V, V
O
=
0V or V
CC
8
pF