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Электронный компонент: 74LVX245MTCX

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2005 Fairchild Semiconductor Corporation
DS011597
www.fairchildsemi.com
April 1993
Revised April 2005
7
4
L
VX24
5

Low V
o
l
t
age Oct
a
l Bidi
rec
t
i
onal T
r
an
sceive
r
74LVX245
Low Voltage Octal Bidirectional Transceiver
General Description
The LVX245 contains eight non-inverting bidirectional buff-
ers and is intended for bus-oriented applications. The
Transmit/Receive (T/R) input determines the direction of
data flow through the bidirectional transceiver. Transmit
(active-HIGH) enables data from A ports to B ports;
Receive (active-LOW) enables data from B ports to A
ports. The Output Enable input, when HIGH, disables both
A and B ports by placing them in a high impedance condi-
tion.
Features
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbols
Connection Diagram
Pin Descriptions
Truth Table
H
HIGH Voltage Level
X
Immaterial
L
LOW Voltage Level
Order Number
Package Number
Package Description
74LVX245M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVX245SJ
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin
Description
Names
OE
Output Enable Input
T/R
Transmit/Receive Input
A
0
A
7
Side A Inputs or 3-STATE Outputs
B
0
B
7
Side B Inputs or 3-STATE Outputs
Inputs
Outputs
OE
T/R
L
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
HIGH-Z State
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74
L
VX245
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
(Note 2)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
(Note 3)
Note 3: Input t
r
t
f
3 ns
Supply Voltage (V
CC
)
0.5V to
7.0V
DC Input Diode Current (I
IK
)
V
I
0.5V
20 mA
DC Input Voltage T/R, OE (V
I
)
0.5V to 7V
DC Diode Current (I
OK
)
V
O
0.5V
20 mA
V
O
V
CC
0.5V
20 mA
DC Bus I/O Voltage (V
I/O
)
0.5V to V
CC
0.5V
DC Output Source
or Sink Current (I
O
)
r
25 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
r
75 mA
Storage Temperature (T
STG
)
65
q
C to
150
q
C
Power Dissipation
180 mW
Supply Voltage (V
CC
)
2.0V to 3.6V
Input Voltage T/R, OE (V
I
)
0V to 5.5V
Bus I/O Voltage (V
I/O
)
0V to V
CC
Operating Temperature (T
A
)
40
q
C to
85
q
C
Input Rise and Fall Time (
'
t/
'
V)
0 ns/V to 100 ns/V
Symbol
Parameter
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Conditions
Min
Typ
Max
Min
Max
V
IH
HIGH Level
2.0
1.5
1.5
Input 3.0
2.0
2.0
V
Voltage
3.6
2.4
2.4
V
IL
LOW Level
2.0
0.5
0.5
Input 3.0
0.8
0.8
V
Voltage
3.6
0.8
0.8
V
OH
HIGH Level
2.0
1.9
2.0
1.9
V
IN
V
IH
or V
IL
I
OH
50
P
A
Output
3.0
2.9
3.0
2.9
V
I
OH
50
P
A
Voltage
3.0
2.58
2.48
I
OH
4 mA
V
OL
LOW Level
2.0
0.0
0.1
0.1
V
IN
V
IH
or V
IL
I
OL
50
P
A
Output 3.0
0.0
0.1
0.1
V
I
OL
50
P
A
Voltage
3.0
0.36
0.44
I
OL
4 mA
I
OZ
3-STATE 3.6
r
0.25
r
2.5
P
A
V
IN
V
IH
or V
IL
Output
V
OUT
V
CC
or GND
Off-State Current
I
IN
Input Leakage Current
3.6
r
0.1
r
1.0
P
A
V
IN
5.5V or GND
I
CC
Quiescent Supply Current
3.6
4.0
40.0
P
A
V
IN
V
CC
or GND
Symbol
Parameter
V
CC
T
A
25
q
C
Units
Conditions
(V)
Typ
Limit
C
L
(pF)
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.5
0.8
V
50
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
0.5
0.8
V
50
V
IHD
Minimum HIGH Level Dynamic Input Voltage
3.3
2.0
V
50
V
ILD
Maximum LOW Level Dynamic Input Voltage
3.3
0.8
V
50
3
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2
45
AC Electrical Characteristics
Note 4: Parameter guaranteed by design. t
OSLH
|t
PLHm
t
PLHn
|, t
OSHL
|t
PHLm
t
PHLn
|
Capacitance
Note 5: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Symbol
Parameter
V
CC
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Conditions
(V)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay Time
2.7
6.1
10.7
1.0
13.5
ns
C
L
15 pF
t
PHL
8.6
14.2
1.0
17.0
C
L
50 pF
3.3
r
0.3
4.7
6.8
1.0
8.0
C
L
15 pF
7.2
10.1
1.0
11.5
C
L
50 pF
t
PZL
3-STATE Output
2.7
9.0
16.9
1.0
20.5
ns
C
L
15 pF, R
L
1 k
:
t
PZH
Enable Time
11.5
20.4
1.0
24.0
C
L
50 pF, R
L
1 k
:
3.3
r
0.3
7.1
11.0
1.0
13.0
C
L
15 pF, R
L
1 k
:
9.6
14.5
1.0
16.5
C
L
50 pF, R
L
1 k
:
t
PLZ
3-STATE Output
2.7
11.5
18.0
1.0
21.0
ns
C
L
50 pF, R
L
1 k
:
t
PHZ
Disable Time
3.3
r
0.3
9.6
12.8
1.0
14.5
C
L
50 pF, R
L
1 k
:
t
OSLH
Output to Output Skew
2.7
1.5
1.5
ns
C
L
50 pF (Note 4)
t
OSHL
(Note 4)
3.3
1.5
1.5
Symbol
Parameter
T
A
25
q
C
T
A
40
q
C to
85
q
C
Units
Min
Typ
Max
Min
Max
C
IN
Input Capacitance T/R, OE
4
10
10
pF
C
I/O
Output Capacitance A
n
, B
n
8
pF
C
PD
Power Dissipation Capacitance (Note 5)
21
pF
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74
L
VX245
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
5
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74
L
V
X
2
45
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D