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Электронный компонент: 74VCX162244G

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2005 Fairchild Semiconductor Corporation
DS500040
www.fairchildsemi.com
August 1997
Revised June 2005
7
4
VC
X16
2244
L
o
w
V
o
lt
age

16-
Bit

Buf
f
er
/Li
ne Driv
er w
i
th 3.
6V
T
o
l
e
rant

I
nput
s and O
u
t
put
s and 26
:
Seri
es
Res
i
st
or in Output
s
74VCX162244
Low Voltage 16-Bit Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
and 26
:
Series Resistor in Outputs
General Description
The VCX162244 contains sixteen non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX162244 is designed for low voltage (1.2V to
3.6V) V
CC
applications with I/O capability up to 3.6V. The
74VCX162244 is also designed with 26
:
series resistors in
the outputs. This design reduces line noise in applications
such as memory address drivers, clock drivers, and bus
transceivers/transmitters.
The 74VCX162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.2V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
26
:
series resistors in outputs
s
t
PD
3.3 ns max for 3.0V to 3.6V V
CC
s
Power-off high impedance inputs and outputs
s
Supports live insertion and withdrawal
s
Static Drive (I
OH
/I
OL
)
r
12 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2: Ordering Code "G" indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbol
Order Number
Package Number
Package Description
74VCX162244G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74VCX162244MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
www.fairchildsemi.com
2
74VCX162244
Connection Diagrams
Pin Assignment for TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Tables
H
HIGH Voltage Level
L
LOW Voltage Level
X
Immaterial (HIGH or LOW, inputs may not float)
Z
High Impedance
Pin Names
Description
OE
n
Output Enable Input (Active LOW)
I
0
I
15
Inputs
O
0
O
15
Outputs
NC
No Connect
1
2
3
4
5
6
A
O
0
NC
OE
1
OE
2
NC
I
0
B
O
2
O
1
NC
NC
I
1
I
2
C
O
4
O
3
V
CC
V
CC
I
3
I
4
D
O
6
O
5
GND
GND
I
5
I
6
E
O
8
O
7
GND
GND
I
7
I
8
F
O
10
O
9
GND
GND
I
9
I
10
G
O
12
O
11
V
CC
V
CC
I
11
I
12
H
O
14
O
13
NC
NC
I
13
I
14
J
O
15
NC
OE
4
OE
3
NC
I
15
Inputs
Outputs
OE
1
I
0
I
3
O
0
O
3
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
2
I
4
I
7
O
4
O
7
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
3
I
8
I
11
O
8
O
11
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
4
I
12
I
15
O
12
O
15
L
L
L
L
H
H
H
X
Z
3
www.fairchildsemi.com
7
4
VC
X16
2244
Functional Description
The 74VCX162244 contains sixteen non-inverting buffers
with 3-STATE outputs. The device is nibble (4 bits) con-
trolled with each nibble functioning identically, but indepen-
dent of each other. The control pins may be shorted
together to obtain full 16-bit operation.The 3-STATE out-
puts are controlled by an Output Enable (OE
n
) input. When
OE
n
is LOW, the outputs are in the 2-state mode. When
OE
n
is HIGH, the standard outputs are in the high imped-
ance mode but this does not interfere with entering new
data into the inputs.
Logic Diagram
www.fairchildsemi.com
4
74VCX162244
Absolute Maximum Ratings
(Note 4)
Recommended Operating
Conditions
(Note 6)
Note 4: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The "Recommended Operating Conditions" table will define the condi-
tions for actual device operation.
Note 5: I
O
Absolute Maximum Rating must be observed.
Note 6: Floating or unused inputs must be held HIGH or LOW.
DC Electrical Characteristics (2.7V
V
CC
d
3.6V)
Supply Voltage (V
CC
)
0.5V to
4.6V
DC Input Voltage (V
I
)
0.5V to
4.6V
Output Voltage (V
O
)
Outputs 3-STATE
0.5V to
4.6V
Outputs Active (Note 5)
0.5V to V
CC
0.5V
DC Input Diode Current (I
IK
) V
I
0V
50 mA
DC Output Diode Current (I
OK
)
V
O
0V
50 mA
V
O
!
V
CC
50 mA
DC Output Source/Sink Current
(I
OH
/I
OL
)
r
50 mA
DC V
CC
or GND Current per
Supply Pin (I
CC
or GND)
r
100 mA
Storage Temperature Range (T
STG
)
65
q
C to
150
q
C
Power Supply
Operating 1.2V
to
3.6V
Data Retention Only
1.2V to 3.6V
Input Voltage
0.3V to
3.6V
Output Voltage (V
O
)
Output in Active States
0V to V
CC
Output in 3-State
0.0V to 3.6V
Output Current in I
OH
/I
OL
V
CC
3.0V to 3.6V
r
12 mA
V
CC
2.3V to 2.7V
r
8 mA
V
CC
1.65V to 2.3V
r
3 mA
V
CC
1.4V to 1.6V
r
2 mA
V
CC
1.2V
r
100
P
A
Free Air Operating Temperature (T
A
)
40
q
C to
85
q
C
Minimum Input Edge Rate (
'
t/
'
V)
V
IN
0.8V to 2.0V, V
CC
3.0V
10 ns/V
Symbol
Parameter
Conditions
V
CC
Min
Max
Units
(V)
V
IH
HIGH Level Input Voltage
2.7 - 3.6
2.0
V
2.3 - 2.7
1.6
1.65 - 2.3
0.65 x V
CC
1.4 - 1.6
0.65 x V
CC
1.2
0.65 x V
CC
V
IL
LOW Level Input Voltage
2.7 - 3.6
0.8
V
2.3 - 2.7
0.7
1.65 - 2.3
0.35 x V
CC
1.4 - 1.6
0.35 x V
CC
1.2
0.5 x V
CC
V
OH
HIGH Level Output Voltage
I
OH
100
P
A 2.7
-
3.6
V
CC
- 0.2
V
I
OH
6 mA
2.7
2.2
I
OH
8 mA
3.0
2.4
I
OH
12 mA
3.0
2.2
I
OH
100
P
A 2.7
-
3.6
V
CC
- 0.2
I
OH
4 mA
2.3
2.0
I
OH
6 mA
2.3
1.8
I
OH
8 mA
2.3
1.7
I
OH
100
P
A
1.65 - 2.3
V
CC
- 0.2
I
OH
3 mA
1.65
1.25
I
OH
100
P
A 1.4
-
1.6
V
CC
- 0.2
I
OH
1 mA
1.4
1.05
I
OH
100
P
A 1.2
V
CC
- 0.1
5
www.fairchildsemi.com
7
4
VC
X16
2244
DC Electrical Characteristics (2.7V < VCC 3.6V)
(Continued)
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
(Note 8)
Note 8: For C
L
50
P
F, add approximately 300 ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Symbol
Parameter
Conditions
V
CC
Min
Max
Units
(V)
V
OL
LOW Level Output Voltage
I
OL
100
P
A
2.7 - 3.6
0.2
V
I
OL
6 mA
2.7
0.4
I
OL
8 mA
3.0
0.55
I
OL
12 mA
3.0
0.8
I
OL
100
P
A
2.7 - 3.6
0.2
I
OL
6 mA
2.3
0.4
I
OL
8 mA
2.3
0.6
I
OL
100
P
A 1.65
-
2.3
0.2
I
OL
3 mA
1.65
0.3
I
OL
100
P
A
1.4 - 1.6
0.2
I
OL
1 mA
1.4
0.35
I
OL
100
P
A 1.2
0.1
I
I
Input Leakage Current
0
d
V
I
d
3.6V
1.2 - 3.6
r
5.0
P
A
I
OZ
3-STATE Output Leakage
0
d
V
O
d
3.6V
1.2 - 3.6
r
10
P
A
V
I
V
IH
or V
IL
I
OFF
Power-OFF Leakage Current
0
d
(V
I
, V
O
)
d
3.6V
0
10
P
A
I
CC
Quiescent Supply Current
V
I
V
CC
or GND
1.2 - 3.6
20
V
CC
d
(V
I
, V
O
)
d
3.6V (Note 7)
1.2 - 3.6
r
20
P
A
'
I
CC
Increase in I
CC
per Input
V
IH
V
CC
0.6V
2.7 - 3.6
750
P
A
Symbol
Parameter
Conditions
V
CC
T
A
40
q
C to
85
q
C
Units
Figure
(V)
Min
Max
Number
t
PHL
, Propagation
Delay
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.8
3.3
ns
Figures
1, 2
t
PLH
2.5
r
0.2
1.0
3.8
1.8
r
0.15
1.5
7.6
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.0
15.2
Figures
5, 6
1.2
1.5
38
t
PZL
,
Output Enable Time
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.8
3.8
ns
Figures
1, 3, 4
t
PZH
2.5
r
0.2
1.0
5.1
1.8
r
0.15
1.5
9.8
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.0
19.6
Figures
5, 7, 8
1.2
1.5
49
t
PLZ
,
Output Disable Time
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.8
3.6
ns
Figures
1, 3, 4
t
PHZ
2.5
r
0.2
1.0
4.0
1.8
r
0.15
1.5
7.2
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.0
14.4
Figures
5, 7, 8
1.2
1.5
36
t
OSHL
Output to Output Skew
C
L
30 pF, R
L
500
:
3.3
r
0.3
0.5
ns
t
OSLH
(Note 9)
2.5
r
0.2
0.5
1.8
r
0.15
0.75
C
L
15 pF, R
L
2k
:
1.5
r
0.1
1.5
1.2
1.5