2004 Fairchild Semiconductor Corporation
DS500126
www.fairchildsemi.com
March 1998
Revised October 2004
7
4
VC
X16
601
Lo
w
V
o
lt
age
1
8
-Bi
t
Univer
sal Bus T
r
ansce
iver
s
wi
th 3.6V T
o
ler
a
nt
I
nputs and O
u
tput
s
74VCX16601
Low Voltage 18-Bit Universal Bus Transceivers
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX16601 is an 18-bit universal bus transceiver which
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be con-
trolled by the clock-enable (CLKENAB and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to-
LOW logic level. If LEAB is LOW, the A bus data is stored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. When OEAB is LOW, the outputs are active. When
OEAB is HIGH, the outputs are in the high-impedance
state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, CLKBA and CLKENBA.
The VCX16601 is designed for low voltage (1.4V to 3.6V)
V
CC
applications with I/O capability up to 3.6V.
The VCX16601 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
t
PD
(A to B, B to A)
2.9 ns max for 3.0V to 3.6V V
CC
s
Power-down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
)
24 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latchup performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2: BGA package available in Tape and Reel only.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Order Number
Package Number
Package Description
74VCX16601GX
(Note 2)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
74VCX16601MTD
(Note 3)
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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2
74VCX16601
Connection Diagrams
Pin Assignment for TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Table
(Note 4)
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial (HIGH or LOW, inputs may not float)
Z
=
High Impedance
Note 4: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA,
LEBA, CLKBA, and CLKENBA.
Note 5: Output level before the indicated steady-state input conditions
were established.
Note 6: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Pin Names
Description
OEAB, OEBA
Output Enable Inputs (Active LOW)
LEAB, LEBA
Latch Enable Inputs
CLKAB, CLKBA
Clock Inputs
CLKENAB, CLKENBA Clock Enable Inputs
A
1
A
18
Side A Inputs or 3-STATE Outputs
B
1
B
18
Side B Inputs or 3-STATE Outputs
1
2
3
4
5
6
A
A
2
A
1
OEAB CLKENAB
B
1
B
2
B
A
4
A
3
LEAB
CLKAB
B
3
B
4
C
A
6
A
5
V
CC
V
CC
B
5
B
6
D
A
8
A
7
GND
GND
B
7
B
8
E
A
10
A
9
GND
GND
B
9
B
10
F
A
12
A
11
GND
GND
B
11
B
12
G
A
14
A
13
V
CC
V
CC
B
13
B
14
H
A
16
A
15
OEBA
CLKBA
B
15
B
16
J
A
17
A
18
LEBA CLKENBA
B
18
B
17
Inputs
Outputs
CLKENAB
OEAB LEAB CLKAB
A
n
B
n
X
H
X
X
X
Z
X
L
H
X
L
L
X
L
H
X
H
H
H
L
L
X
X
B
0
(Note 5)
H
L
L
X
X
B
0
(Note 5)
L
L
L
L
L
L
L
L
H
H
L
L
L
L
X
B
0
(Note 5)
L
L
L
H
X
B
0
(Note 6)
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4
74VCX16601
Absolute Maximum Ratings
(Note 7)
Recommended Operating
Conditions
(Note 9)
Note 7: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The Recommended Operating Conditions tables will define the condi-
tions for actual device operation.
Note 8: I
O
Absolute Maximum Rating must be observed.
Note 9: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
DC Electrical Characteristics
Supply Voltage (V
CC
)
-
0.5V to
+
4.6V
DC Input Voltage (V
I
)
-
0.5V to
+
4.6V
Output Voltage (V
O
)
Outputs 3-Stated
-
0.5V to
+
4.6V
Outputs Active (Note 8)
-
0.5 to V
CC
+
0.5V
DC Input Diode Current (I
IK
) V
I
<
0V
-
50 mA
DC Output Diode Current (I
OK
)
V
O
<
0V
-
50 mA
V
O
>
V
CC
+
50 mA
DC Output Source/Sink Current
(I
OH
/I
OL
)
50 mA
DC V
CC
or Ground Current per
Supply Pin (I
CC
or Ground)
100 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Supply
Operating
1.4V to 3.6V
Input Voltage
-
0.3V to 3.6V
Output Voltage (V
O
)
Output in Active States
0V to V
CC
Output in 3-STATE
0.0V to 3.6V
Output Current in I
OH
/I
OL
V
CC
=
3.0V to 3.6V
24 mA
V
CC
=
2.3V to 2.7V
18 mA
V
CC
=
1.65V to 2.3V
6 mA
V
CC
=
1.4V to 1.6V
2 mA
Free Air Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate (
t/
V)
V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
10 ns/V
Symbol
Parameter
Conditions
V
CC
Min
Max
Units
(V)
V
IH
HIGH Level Input Voltage
2.7 - 3.6
2.0
V
2.3 - 2.7
1.6
1.65 - 2.3
0.65 x V
CC
1.4 - 1.6
0.65 x V
CC
V
IL
LOW Level Input Voltage
2.7 - 3.6
0.8
V
2.3 - 2.7
0.7
1.65 - 2.3
0.35 - V
CC
1.4 - 1.6
0.35 - V
CC
V
OH
HIGH Level Output Voltage
I
OH
=
-
100
A
2.7 - 3.6
V
CC
- 0.2
V
I
OH
=
-
12 mA
2.7
2.2
I
OH
=
-
18 mA
3.0
2.4
I
OH
=
-
24 mA
3.0
2.2
I
OH
=
-
100
A
2.3 - 2.7
V
CC
- 0.2
I
OH
=
-
6 mA
2.3
2.0
I
OH
=
-
12 mA
2.3
1.8
I
OH
=
-
18 mA
2.3
1.7
I
OH
=
-
100
A
1.65 - 2.3
V
CC
- 0.2
I
OH
=
-
6 mA
1.65
1.25
I
OH
=
-
100
A
1.4 - 1.6
V
CC
- 0.2
I
OH
=
-
2 mA
1.4
1.05
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