April 1994
Revised April 1999
7
4
VH
C43
16
Quad Analog
Swit
ch w
i
th Level
T
r
ansl
ator
1999 Fairchild Semiconductor Corporation
DS011678.prf
www.fairchildsemi.com
74VHC4316
Quad Analog Switch with Level Translator
General Description
These devices are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low "on" resistance and low "off" leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Three sup-
ply pins are provided on the 4316 to implement a level
translator which enables this circuit to operate with 0V6V
logic levels and up to
6V analog switch levels. The 4316
also has a common enable input in addition to each
switch's control which when HIGH will disable all switches
to their off state. All analog inputs and outputs and digital
inputs are protected from electrostatic damage by diodes
to V
CC
and ground.
Features
s
Typical switch enable time: 20 ns
s
Wide analog input voltage range:
6V
s
Low "on" resistance: 50 typ. (V
CC
-
V
EE
=
4.5V)
30 typ. (V
CC
-
V
EE
=
9V)
s
Low quiescent current: 80
A maximum (74VHC)
s
Matched switch characteristics
s
Individual switch controls plus a common enable
s
Pin functional compatible with 74HC4316
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Truth Table
Connection Diagram
Top View
Logic Diagram
Order Number
Package Number
Package Description
74VHC4316M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74VHC4316WM
M16B
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74VHC4316MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4316N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Switch
E
CTL
I/OO/I
H
X
"OFF"
L
L
"OFF"
L
H
"ON"
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2
74VHC4316
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operating
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating -- plastic "N" package:
-
12 mW/
C from 65
C to 85
C.
DC Electrical Characteristics
(Note 4)
Note 4: For a power supply of 5V
10% the worst case on resistances (R
ON
) occurs for VHC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage current occurs
for CMOS at the higher voltage and so the 5.5V values should be used.
Note 5: At supply voltages (V
CC
V
EE
) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that
these devices be used to transmit digital only when using these supply voltages.
Supply Voltage (V
CC
)
-
0.5 to
+
7.5V
Supply Voltage (V
EE
)
+
0.5 to
-
7.5V
DC Control Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Switch I/O Voltage (V
IO
)
V
EE
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
) (Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
2
6
V
Supply Voltage (V
EE
)
0
-
6
V
DC Input or Output Voltage
0
V
CC
V
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
-
40
+
85
C
Input Rise or Fall Times
(t
r
, t
f
)
V
CC
=
2.0V
1000
ns
V
CC
=
4.5V
500
ns
V
CC
=
6.0V
400
ns
V
CC
=
12.0V
250
ns
Symbol
Parameter
Conditions
V
EE
V
CC
T
A
=
25
C
T
A
=
-
40
C to
+
85
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH
2.0V
1.5
1.5
Level Input
4.5V
3.15
3.15
V
Voltage
6.0V
4.2
4.2
V
IL
Maximum LOW
2.0V
0.5
0.5
Level Input
4.5V
1.35
1.35
V
Voltage
6.0V
1.8
1.8
R
ON
Minimum "ON"
V
CTL
=
V
IH
,
GND
4.5V
100
170
200
Resistance
I
S
=
2.0 mA
-
4.5V
4.5V
40
85
105
(Note 5)
V
IS
=
V
CC
to V
EE
-
6.0V
6.0V
30
70
85
(
Figure 1)
V
CTL
=
V
IH
,
GND
2.0V
100
180
215
I
S
=
2.0 mA
GND
4.5V
40
80
100
V
IS
=
V
CC
or V
EE
-
4.5V
4.5V
50
60
75
(
Figure 1)
-
6.0V
6.0V
20
40
60
R
ON
Maximum "ON"
V
CTL
=
V
IH
GND
4.5V
10
15
20
Resistance
V
IS
=
V
CC
to V
EE
-
4.5V
4.5V
5
10
15
Matching
-
6.0V
6.0V
5
10
15
I
IN
Maximum Control
V
IN
=
V
CC
or GND
GND
6.0V
0.1
1.0
A
Input Current
I
IZ
Maximum Switch
V
OS
=
V
CC
or V
EE
"OFF" Leakage
V
IS
=
V
EE
or V
CC
GND
6.0V
30
300
nA
Current
V
CTL
=
V
IL
-
6.0V
6.0V
50
500
(
Figure 2)
I
IZ
Maximum Switch
V
IS
=
V
CC
to V
EE
"ON" Leakage
V
CTL
=
V
IH
,
GND
6.0V
20
75
nA
Current
V
OS
=
OPEN
-
6.0V
6.0V
30
150
(
Figure 3)
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
GND
6.0V
1.0
10
A
Supply Current
I
OUT
=
0
A
-
6.0V
6.0V
4.0
40
3
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7
4
VH
C43
16
AC Electrical Characteristics
V
CC
=
2.0V
-
6.0V, V
EE
=
0V
-
6V, C
L
=
50 pF unless otherwise specified
Note 6: Adjust 0 dBm for f
=
1 kHz (Null R
L
/Ron Attenuation).
Note 7: V
IS
is centered at V
CC
V
EE
/2.
Note 8: Adjust for 0 dBm.
Symbol
Parameter
Conditions
V
EE
V
CC
T
A
=+
25
C
T
A
=-
40
C to
+
85
C
Units
Typ
Guaranteed Limits
t
PHL
, t
PLH
Maximum Propagation
GND
3.3V
15
30
37
Delay Switch In to
GND
4.5V
5
10
13
ns
Out
-
4.5V
4.5V
4
8
12
-
6.0V
6.0V
3
7
11
t
PZL
, t
PZH
Maximum Switch Turn
R
L
=
1 k
GND
3.3V
25
97
120
"ON" Delay
GND
4.5V
20
35
43
ns
(Control)
-
4.5V
4.5V
15
32
39
-
6.0V
6.0V
14
30
37
t
PHZ
, t
PLZ
Maximum Switch Turn
R
L
=
1 k
GND
3.3V
35
145
180
"OFF" Delay
GND
4.5V
25
50
63
ns
(Control)
-
4.5V
4.5V
20
44
55
-
6.0V
6.0V
20
44
55
t
PZL
, t
PZH
Maximum Switch
GND
3.3V
27
120
150
Turn "ON" Delay
GND
4.5V
20
41
52
ns
(Enable)
-
4.5V
4.5V
19
38
48
-
6.0V
6.0V
18
36
45
t
PLZ
, t
PHZ
Maximum Switch
GND
3.3V
42
155
190
Turn "OFF" Delay
GND
4.5V
28
53
67
ns
(Enable)
-
4.5V
4.5V
23
47
59
-
6.0V
6.0V
21
47
59
Minimum Frequency
R
L
=
600
, V
IS
=
2V
PP
0V
4.5
40
Response (
Figure 7)
at (V
CC
V
EE
/2)
-
4.5V
4.5V
100
MHz
20 log (V
OS
/V
IS
)
=
-
3 dB
(Note 6)(Note 7)
Control to Switch
R
L
=
600
, f
=
1 MHz
0V
4.5V
100
Feedthrough Noise
C
L
=
50 pF
-
4.5V
4.5V
250
mV
(
Figure 8)
(Note 7)(Note 8)
Crosstalk Between
R
L
=
600
, f
=
1 MHz
0V
4.5V
-
52
any Two Switches
-
4.5V
4.5V
-
50
dB
(
Figure 9)
Switch OFF Signal
R
L
=
600
, f
=
1 MHz
Feedthrough
V
CTL
=
V
IL
0V
4.5V
-
42
dB
Isolation
-
4.5V
4.5V
-
44
(
Figure 10)
(Note 7)(Note 8)
THD
Sinewave Harmonic
R
L
=
10 K
, C
L
=
50 pF,
Distortion
f
=
1 KHz
%
(
Figure 11)
V
IS
=
4 V
PP
0V
4.5V
0.013
V
IS
=
8 V
PP
-
4.5V
4.5V
0.008
C
IN
Maximum Control
5
pF
Input Capacitance
C
IN
Maximum Switch
35
pF
Input Capacitance
C
IN
Maximum Feedthrough
V
CTL
=
GND
0.5
pF
Capacitance
C
PD
Power Dissipation
15
pF
Capacitance
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4
74VHC4316
AC Test Circuits and Switching Time Waveforms
FIGURE 1. "ON" Resistance
FIGURE 2. "OFF" Channel Leakage Current
FIGURE 3. "ON" Channel Leakage Current
FIGURE 4. t
PHL
, t
PLH
Propagation Delay Time Signal Input to Signal Output
FIGURE 5. t
PZL
, t
PLZ
Propagation Delay Time Control to Signal Output
FIGURE 6. t
PZH
, t
PHZ
Propagation Delay Time Control to Signal Output
5
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7
4
VH
C43
16
AC Test Circuits and Switching Time Waveforms
(Continued)
FIGURE 7. Frequency Response
FIGURE 8. Crosstalk: Control Input to Signal Output
FIGURE 9. Crosstalk between Any Two Switches
FIGURE 10. Switch OFF Signal Feedthrough Isolation
FIGURE 11. Sinewave Distortion
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