October 1987
Revised January 1999
CD403
0C Quad
EX
CLUSI
VE-OR Gat
e
1999 Fairchild Semiconductor Corporation
DS005961.prf
www.fairchildsemi.com
CD4030C
Quad EXCLUSIVE-OR Gate
General Description
The CD4030C EXCLUSIVE-OR gates are monolithic com-
plementary MOS (CMOS) integrated circuits constructed
with N- and P-channel enhancement mode transistors. All
inputs are protected against static discharge with diodes to
V
DD
and V
SS
.
Features
s
Wide supply voltage range:
3.0V to 15V
s
Low power:
100 nW (typ.)
s
Medium speed operation:
t
PHL
=
t
PLH
=
40 ns (typ.) at C
L
=
15 pF, 10V supply
s
High noise immunity
0.45 V
CC
(typ.)
Applications
Automotive
Data terminals
Instrumentation
Medical electronics
Industrial controls
Remote metering
Computers
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOP
Truth Table
1
=
HIGH Level
0
=
LOW Level
Order Number
Package Number
Package Description
CD4030CSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4030CN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
A
B
J
0
0
0
1
0
1
0
1
1
1
1
0
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2
CD403
0C
Logic Diagram
3
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CD403
0C
Absolute Maximum Ratings
(Note 1)
Note 1: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed. Except for "Operating Tempera-
ture Range" they are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristics tables provide conditions
for actual device operation.
Note 2: This device should not be connected to circuits with power on
because high transient voltages may cause permanent damage.
DC Electrical Characteristics
Note 3: I
D
N and I
D
P are tested one output at a time.
AC Electrical Characteristics
(Note 4)
Note 4: AC Parameters are guaranteed by DC correlated testing.
Voltage at Any Pin (Note 2)
V
SS
-
0.3V to V
SS
+
15.5V
Operating Temperature Range
-
40
C to
+
85
C
Storage Temperature Range
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Operating V
DD
Range
V
SS
+
3.0V to V
SS
+
15V
Lead Temperature
(Soldering, 10 seconds)
260
C
Limits
Symbol
Parameter
Conditions
-
40
C
+
25
C
+
85
C
Units
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
I
L
Quiescent Device
V
DD
=
5.0V
5.0
0.05
5.0
70
A
Current
V
DD
=
10V
10
0.1
10
140
A
P
D
Quiescent Device
V
DD
=
5.0V
25
0.25
25
350
W
Dissipation Package
V
DD
=
10V
100
1.0
100
1,400
W
V
OL
Output Voltage
V
DD
=
5.0V
0.05
0
0.05
0.05
V
LOW Level
V
DD
=
10V
0.05
0
0.05
0.05
V
V
OH
Output Voltage
V
DD
=
5.0V
4.95
4.95
5.0
4.95
V
HIGH Level
V
DD
=
10V
9.95
9.95
10
9.95
V
V
NL
Noise Immunity
V
DD
=
5.0V
1.5
1.5
2.25
1.4
V
(All Inputs)
V
DD
=
10V
3.0
3.0
4.5
2.9
V
V
NH
Noise Immunity
V
DD
=
5.0V
1.4
1.5
2.25
1.5
V
(All Inputs)
V
DD
=
10V
2.9
3.0
4.5
3.0
V
I
D
N
Output Drive Current
V
DD
=
5.0V
0.35
0.3
1.2
0.25
mA
N-Channel (Note 3)
V
DD
=
10V
0.7
0.6
2.4
0.5
mA
I
D
P
Output Drive Current
V
DD
=
5.0V
-
0.21
-
0.15
-
0.6
-
0.12
mA
P-Channel (Note 3)
V
DD
=
10 V
-
0.45
-
0.32
-
1.3
-
0.25
mA
I
I
Input Current
V
I
=
0V or V
I
=
V
DD
10
pA
Symbol
Parameter
Conditions
Limits
Units
Min
Typ
Max
t
PHL
Propagation Delay Time
V
DD
=
5.0V
100
300
ns
V
DD
=
10V
40
150
ns
t
PLH
Propagation Delay Time
V
DD
=
5.0V
100
300
ns
V
DD
=
10V
40
150
ns
t
THL
Transition Time
V
DD
=
5.0V
70
300
ns
HIGH-to-LOW Level
V
DD
=
10V
25
150
ns
t
TLH
Transition Time
V
DD
=
5.0V
80
300
ns
LOW-to-HIGH Level
V
DD
=
10V
30
150
ns
C
I
Input Capacitance
V
I
=
0V or V
I
=
V
DD
5.0
pF
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4
CD403
0C
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
CD403
0C Quad
EX
CLUSI
VE-OR Gat
e
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
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