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Электронный компонент: DM74174

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2000 Fairchild Semiconductor Corporation
DS006557
www.fairchildsemi.com
September 1986
Revised February 2000
DM74174
Hex/
Q
u
ad D-
T
y
pe Fl
ip-
F
l
op wi
th
Clear
DM74174
Hex/Quad D-Type Flip-Flop with Clear
General Description
These positive-edge triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic. All have a direct clear
input.
Information at the D inputs meeting the setup and hold time
requirements is transferred to the Q outputs on the posi-
tive-going edge of the clock pulse. Clock triggering occurs
at a particular voltage level and is not directly related to the
transition time of the positive-going pulse. When the clock
input is at either the HIGH or LOW level, the D input signal
has no effect at the output.
Features
s
Contains six flip-flops with single-rail outputs
s
Buffered clock and direct clear inputs
s
Individual data input to each flip-flop
s
Applications include:
Buffer/storage registers
Shift registers
Pattern generators
s
Typical clock frequency 40 MHz
s
Typical power dissipation per flip-flop 38 mW
Ordering Code:
Connection Diagram
Function Table
(Each Flip-Flop)
H
=
HIGH Level (steady state)
L
=
LOW Level (steady state)
X
=
Don't Care
=
Transition from LOW-to-HIGH level
Q
0
=
The level of Q before the indicated steady-state input conditions were
established.
Order Number
Package Number
Package Description
DM74174
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
Clear
Clock
D
Q
L
X
X
L
H
H
H
H
L
L
H
L
X
Q
0
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2
DM74174
Logic Diagram
3
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DM74174
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2: T
A
=
25
C and V
CC
=
5V.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 3: All typicals are at V
CC
=
5V, T
A
=
25
C.
Note 4: Not more than one output should be shorted at a time.
Note 5: With all outputs open and all DATA and CLEAR inputs at 4.5V, I
CC
is measured after a momentary ground, then 4.5V applied to the CLOCK input.
Switching Characteristics
at V
CC
=
5V and T
A
=
25
C
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
0
C to
+
70
C
Storage Temperature Range
-
65
C to
+
150
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
0.8
mA
I
OL
LOW Level Output Current
16
mA
f
CLK
Clock Frequency (Note 2)
0
30
MHz
t
W
Pulse Width
Clock LOW
25
(Note 2)
Clock HIGH
10
ns
Clear
20
t
SU
Data Setup Time (Note 2)
20
ns
t
H
Data Hold Time (Note 2)
0
ns
t
REL
Clear Release Time (Note 2)
30
ns
T
A
Free Air Operating Temperature
0
70
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 3)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
12 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.4
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW
Level V
CC
=
Min, I
OL
=
Max
0.4
V
Output Voltage
V
IH
=
Min, V
IL
=
Max
I
I
Input Current @ Max Input Voltage
V
CC
=
Max, V
I
=
5.5V
1
mA
I
IH
HIGH Level Input Current
V
CC
=
Max, V
I
=
2.4V
40
A
I
IL
LOW Level Input Current
V
CC
=
Max, V
I
=
0.4V
-
1.6
mA
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 4)
-
18
-
57
mA
I
CC
Supply Current
V
CC
=
Max (Note 5)
45
65
mA
Symbol
Parameter
From (Input)
R
L
=
400
, C
L
=
15 pF
Units
To (Output)
Min
Max
f
MAX
Maximum Clock Frequency
30
MHz
t
PLH
Propagation Delay Time
Clock to Any Q
25
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Clock to Any Q
25
ns
HIGH-to-LOW Level Output
t
PHL
Propagation Delay Time
Clear to Any Q
40
ns
HIGH-to-LOW Level Output
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4
DM74174
Hex/
Q
uad
D-T
ype
Fl
ip-
F
lo
p wit
h

C
l
ear
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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