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Электронный компонент: DM7442AN

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2000 Fairchild Semiconductor Corporation
DS006516
www.fairchildsemi.com
August 1986
Revised February 2000
DM7442A
BCD t
o
Deci
m
a
l
Decoder
DM7442A
BCD to Decimal Decoder
General Description
These BCD-to-decimal decoders consist of eight inverters
and ten, four-input NAND gates. The inverters are con-
nected in pairs to make BCD input data available for
decoding by the NAND gates. Full decoding of input logic
ensures that all outputs remain off for all invalid (1015)
input conditions.
Features
s
Diode clamped inputs
s
Also for application as 4-line-to-16-line decoders;
3-line-to-8-line decoders
s
All outputs are high for invalid input conditions
s
Typical power dissipation 140 mW
s
Typical propagation delay 17 ns
Ordering Code:
Connection Diagram
Order Number
Package Number
Package Description
DM7442AN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
www.fairchildsemi.com
2
DM
744
2A
Function Table
H
=
HIGH Level
L
=
LOW Level
Logic Diagram
No.
BCD Input
Decimal Output
D
C
B
A
0
1
2
3
4
5
6
7
8
9
0
L
L
L
L
L
H
H
H
H
H
H
H
H
H
1
L
L
L
H
H
L
H
H
H
H
H
H
H
H
2
L
L
H
L
H
H
L
H
H
H
H
H
H
H
3
L
L
H
H
H
H
H
L
H
H
H
H
H
H
4
L
H
L
L
H
H
H
H
L
H
H
H
H
H
5
L
H
L
H
H
H
H
H
H
L
H
H
H
H
6
L
H
H
L
H
H
H
H
H
H
L
H
H
H
7
L
H
H
H
H
H
H
H
H
H
H
L
H
H
8
H
L
L
L
H
H
H
H
H
H
H
H
L
H
9
H
L
L
H
H
H
H
H
H
H
H
H
H
L
I
H
L
H
L
H
H
H
H
H
H
H
H
H
H
N
H
L
H
H
H
H
H
H
H
H
H
H
H
H
V
H
H
L
L
H
H
H
H
H
H
H
H
H
H
A
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
I
H
H
H
H
H
H
H
H
H
H
H
H
H
H
D
3
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DM7442A
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 2: All typicals are at V
CC
=
5V, T
A
=
25
C.
Note 3: Not more than one output should be shorted at a time.
Note 4: I
CC
is measured with all outputs open and all inputs grounded.
Switching Characteristics
at V
CC
=
5V and T
A
=
25
C
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
0
C to
+
70
C
Storage Temperature Range
-
65
C to
+
150
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
0.8
mA
I
OL
LOW Level Output Current
16
mA
T
A
Free Air Operating Temperature
0
70
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 2)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
12 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.4
3.4
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW Level
V
CC
=
Min, I
OL
=
Max
0.2
0.4
V
Output Voltage
V
IH
=
Min, V
IL
=
Max
I
I
Input Current @ Max Input Voltage
V
CC
=
Max, V
I
=
5.5V
1
mA
I
IH
HIGH Level Input Current
V
CC
=
Max, V
I
=
2.4V
40
A
I
IL
LOW Level Input Current
V
CC
=
Max, V
I
=
0.4V
-
1.6
mA
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 3)
-
18
-
55
mA
I
CC
Supply Current
V
CC
=
Max (Note 4)
28
56
mA
Symbol
Parameter
Conditions
Min
Max
Units
t
PHL
Propagation Delay Time
C
L
=
15 pF
HIGH-to-LOW Level Output
R
L
=
400
25
ns
from A, B, C or D through
2 Levels of Logic
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
30
ns
from A, B, C or D through
3 Levels of Logic
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
25
ns
from A, B, C or D through
2 Levels of Logic
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
30
ns
from A, B, C or D through
3 Levels of Logic
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4
DM
744
2A BCD t
o
Dec
i
mal
Decoder
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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