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Электронный компонент: DM74ALS576A

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2000 Fairchild Semiconductor Corporation
DS006228
www.fairchildsemi.com
October 1986
Revised February 2000
DM74ALS576A
Octal
D-
T
ype Edg
e
-T
r
i
gger
ed F
l
i
p
-Fl
op wi
th
3-ST
A
T
E Out
puts
DM74ALS576A
Octal D-Type Edge-Triggered Flip-Flop
with 3-STATE Outputs
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the DM74ALS576A are edge-trig-
gered inverting D-type flip-flops. On the positive transition
of the clock, the Q outputs will be set to the complement of
the logic states that were set up at the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Order Number
Package Number
Package Description
DM74ALS576AWM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS576AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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2
DM
74ALS57
6A
Function Table
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
=
Positive Edge Transition
Z
=
High Impedance State
Q
0
=
Previous Condition of Q
Logic Diagram
Output
Clock
D
Output
Control
Q
L
H
L
L
L
H
L
L
X
Q
0
H
X
X
Z
3
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DM74ALS576A
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2: The (
) arrow indicates the positive edge of the Clock is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25
C.
Supply Voltage
7V
Input Voltage
7V
Voltage Applied to Disabled Output
5.5V
Operating Free Air Temperature Range
0
C to
+
70
C
Storage Temperature Range
-
65
C to
+
150
C
Typical
JA
N Package
56.0
C/W
M Package
75.0
C/W
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.5
5
5.5
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
2.6
mA
I
OL
LOW Level Output Current
24
mA
f
CLOCK
Clock Frequency
0
30
MHz
t
W
Width of Clock Pulse
HIGH
16.5
ns
LOW
16.5
ns
t
SU
Data Setup Time (Note 2)
15
ns
t
H
Data Hold Time (Note 2)
0
ns
T
A
Free Air Operating Temperature
0
70
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IK
Input Clamp Voltage
V
CC
=
4.5V, I
I
=
-
18 mA
-
1.2
V
V
OH
HIGH Level
V
CC
=
4.5V
I
OH
=
Max
2.4
3.2
V
Output Voltage
V
IL
=
V
IL
Max
V
CC
=
4.5V to 5.5V
I
OH
=
-
400
A
V
CC
-
2
V
V
OL
LOW
Level V
CC
=
4.5V
I
OL
=
24 mA
0.35
0.5
V
Output Voltage
V
IH
=
2V
I
I
Input Current @ Maximum
V
CC
=
5.5V, V
IH
=
7V
0.1
mA
Input Voltage
I
IH
HIGH Level Input Current
V
CC
=
5.5V, V
IH
=
2.7V
20
A
I
IL
LOW Level Input Current
V
CC
=
5.5V, V
IL
=
0.4V
-
0.2
mA
I
O
Output Drive Current
V
CC
=
5.5V, V
O
=
2.25V
-
30
-
112
mA
I
OZH
OFF-State Output Current
V
CC
=
5.5V, V
IH
=
2V
20
A
HIGH Level Voltage Applied
V
O
=
2.7V
I
OZL
OFF-State Output Current
V
CC
=
5.5V, V
IH
=
2V
-
20
A
LOW Level Voltage Applied
V
O
=
0.4V
I
CC
Supply Current
V
CC
=
5.5V
Outputs HIGH
10
18
mA
Outputs OPEN
Outputs LOW
15
24
mA
Outputs Disabled
16
30
mA
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4
DM
74ALS57
6A
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
From
To
Min
Max
Units
f
MAX
Maximum Clock Frequency
V
CC
=
4.5V to 5.5V
30
MHz
t
PLH
Propagation Delay Time
R
L
=
500
Clock
Any Q
4
14
ns
LOW-to-HIGH Level Output
C
L
=
50 pF
t
PHL
Propagation Delay Time
Clock
Any Q
4
14
ns
HIGH-to-LOW Level Output
t
PZH
Output Enable Time
Output
Any Q
4
18
ns
to HIGH Level Output
Control
t
PZL
Output Enable Time
Output
Any Q
4
18
ns
to LOW Level Output
Control
t
PHZ
Output Disable Time
Output
Any Q
2
10
ns
from HIGH Level Output
Control
t
PLZ
Output Disable Time
Output
Any Q
3
15
ns
from LOW Level Output
Control
5
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DM74ALS576A
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B