2000 Fairchild Semiconductor Corporation
DS006373
www.fairchildsemi.com
August 1986
Revised March 2000
DM74LS74A Dual Posi
ti
ve-Edge
-T
r
i
gger
ed
D Fli
p
-
F
lops wit
h
Pr
eset,
C
l
ear
and Com
p
lementa
r
y O
u
t
put
s
DM74LS74A
Dual Positive-Edge-Triggered D Flip-Flops with
Preset, Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
gered D flip-flops with complementary outputs. The infor-
mation on the D input is accepted by the flip-flops on the
positive going edge of the clock pulse. The triggering
occurs at a voltage level and is not directly related to the
transition time of the rising edge of the clock. The data on
the D input may be changed while the clock is LOW or
HIGH without affecting the outputs as long as the data
setup and hold times are not violated. A low logic level on
the preset or clear inputs will set or reset the outputs
regardless of the logic levels of the other inputs.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Function Table
H
=
HIGH Logic Level
X
=
Either LOW or HIGH Logic Level
L
=
LOW Logic Level
=
Positive-going Transition
Q
0
=
The output logic level of Q before the indicated input conditions were
established.
Note 1: This configuration is nonstable; that is, it will not persist when either
the preset and/or clear inputs return to their inactive (HIGH) level.
Order Number
Package Number
Package Description
DM74LS74AM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS85ASJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS74AN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
PR
CLR
CLK
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H (Note 1) H (Note 1)
H
H
H
H
L
H
H
L
L
H
H
H
L
X
Q
0
Q
0
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DM
74L
S
7
4A
Absolute Maximum Ratings
(Note 2)
Note 2: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 3: C
L
=
15 pF, R
L
=
2 k
, T
A
=
25
C, and V
CC
=
5V.
Note 4: C
L
=
50 pF, R
L
=
2 k
, T
A
=
25
C, and V
CC
=
5V.
Note 5: The symbol (
) indicates the rising edge of the clock pulse is used for reference.
Note 6: T
A
=
25
C and V
CC
=
5V.
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
0
C to
+
70
C
Storage Temperature Range
-
65
C to
+
150
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
0.4
mA
I
OL
LOW Level Output Current
8
mA
f
CLK
Clock Frequency (Note 3)
0
25
MHz
f
CLK
Clock Frequency (Note 4)
0
20
MHz
t
W
Pulse Width
Clock HIGH
18
(Note 3)
Preset LOW
15
ns
Clear LOW
15
t
W
Pulse Width
Clock HIGH
25
(Note 4)
Preset LOW
20
ns
Clear LOW
20
t
SU
Setup Time (Note 3)(Note 5)
20
ns
t
SU
Setup Time (Note 4)(Note 5)
25
ns
t
H
Hold Time (Note 5)(Note 6)
0
ns
T
A
Free Air Operating Temperature
0
70
C
3
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DM74LS74A
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 7: All typicals are at V
CC
=
5V, T
A
=
25
C.
Note 8: Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs,
where shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where V
O
=
2.125V with the minimum
and maximum limits reduced by one half from their stated values. This is very useful when using automatic test equipment.
Note 9: With all outputs OPEN, I
CC
is measured with CLOCK grounded after setting the Q and Q outputs HIGH in turn.
Switching Characteristics
at V
CC
=
5V and T
A
=
25
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 7)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
18 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.7
3.4
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW
Level V
CC
=
Min, I
OL
=
Max
0.35
0.5
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
I
OL
=
4 mA, V
CC
=
Min
0.25
0.4
I
I
Input Current @ Max
V
CC
=
Max
Data
0.1
Input Voltage
V
I
=
7V
Clock
0.1
mA
Preset
0.2
Clear
0.2
I
IH
HIGH Level
V
CC
=
Max
Data
20
Input Current
V
I
=
2.7V
Clock
20
A
Clear
40
Preset
40
I
IL
LOW
Level V
CC
=
Max
Data
-
0.4
Input Current
V
I
=
0.4V
Clock
-
0.4
mA
Preset
-
0.8
Clear
-
0.8
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 8)
-
20
-
100
mA
I
CC
Supply Current
V
CC
=
Max (Note 9)
4
8
mA
From (Input)
R
L
=
2 k
Symbol
Parameter
To (Output)
C
L
=
15 pF
C
L
=
50 pF
Units
Min
Max
Min
Max
f
MAX
Maximum Clock Frequency
25
20
MHz
t
PLH
Propagation Delay Time
Clock to Q or Q
25
35
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Clock to Q or Q
30
35
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Preset to Q
25
35
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Preset to Q
30
35
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Clear to Q
25
35
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Clear to Q
30
35
ns
HIGH-to-LOW Level Output
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DM
74L
S
7
4A
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
5
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DM74LS74A
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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