2000 Fairchild Semiconductor Corporation
DS006481
www.fairchildsemi.com
August 1986
Revised May 2000
DM74S253
Dual
3-
ST
A
T
E
1-of
-4
Li
ne Dat
a
S
e
lect
or/
M
ult
i
pl
exer
DM74S253
Dual 3-STATE 1-of-4 Line Data Selector/Multiplexer
General Description
Each of these Schottky-clamped data selectors/multiplex-
ers contains inverters and drivers to supply fully comple-
mentary, on-chip, binary decoding data selection to the
AND-OR gates. Separate output control inputs are pro-
vided for each of the two four-line sections.
The 3-STATE outputs can interface directly with data lines
of bus-organized systems. With all but one of the common
outputs disabled (at a high impedance state), the low
impedance of the single enable output will drive the bus
line to a HIGH or LOW logic level.
Features
s
3-STATE version of S153 with same pin-out
s
Schottky-diode-clamped transistors
s
Permits multiplexing from N lines to 1 line
s
Performs parallel-T-serial conversion
s
Strobe/output control
s
High fan-out totem-pole outputs
s
Typical propagation delay
From data to output
6 ns
From select to output
12 ns
s
Typical power dissipation 275 mW
Ordering Code:
Connection Diagram
Function Table
Address inputs A and B are common to both sections.
H
=
HIGH Level
L
=
LOW Level
X
=
Don't Care
Z
=
High Impedance
Order Number
Package Number
Package Description
DM74S253N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Select
Data Inputs
Output
Output
Inputs
Control
B
A
C0
C1
C2
C3
G
Y
X
X
X
X
X
X
H
Z
L
L
L
X
X
X
L
L
L
L
H
X
X
X
L
H
L
H
X
L
X
X
L
L
L
H
X
H
X
X
L
H
H
L
X
X
L
X
L
L
H
L
X
X
H
X
L
H
H
H
X
X
X
L
L
L
H
H
X
X
X
H
L
H
3
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DM74S253
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Note 2: All typicals are at V
CC
=
5V, T
A
=
25
C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 4: I
CC
is measured with all outputs OPEN.
Switching Characteristics
at V
CC
=
5V and T
A
=
25
C
Note 5: C
L
=
5 pF.
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
0
C to
+
70
C
Storage Temperature Range
-
65
C to
+
150
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
6.5
mA
I
OL
LOW Level Output Current
20
mA
T
A
Free Air Operating Temperature
0
70
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 2)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
18 mA
-
1.2
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.4
3.2
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW Level
V
CC
=
Min, I
OL
=
Max
0.5
V
Output Voltage
V
IH
=
Min, V
IL
=
Max
I
I
Input Current @ Max Input Voltage
V
CC
=
Max, V
I
=
5.5V
1
mA
I
IH
HIGH Level Input Current
V
CC
=
Max, V
I
=
2.7V
50
A
I
IL
Low Level Input Current
V
CC
=
Max, V
I
=
0.5V
-
2
mA
I
OZH
Off-State Output Current with
V
CC
=
Max, V
O
=
2.4V
50
A
HIGH Level Output Voltage Applied
V
IH
=
Min, V
IL
=
Max
I
OZL
Off-State Output Current with
V
CC
=
Max, V
O
=
0.5V
-
50
A
LOW Level Output Voltage Applied
V
IH
=
Min, V
IL
=
Max
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 3)
-
40
-
100
mA
I
CC
Supply Current
V
CC
=
Max (Note 4)
55
70
mA
R
L
=
280
Symbol
Parameter
From (Input)
C
L
=
15 pF
C
L
=
50 pF
Units
To (Output)
Min
Max
Min
Max
t
PLH
Propagation Delay Time LOW-to-HIGH Level Output
Data to Y
9
12
ns
t
PHL
Propagation Delay Time HIGH-to-LOW Level Output
Data to Y
9
12
ns
t
PLH
Propagation Delay Time LOW-to-HIGH Level Output
Select to Y
18
21
ns
t
PHL
Propagation Delay Time HIGH-to-LOW Level Output
Select to Y
18
21
ns
t
PZH
Output Enable Time to HIGH Level Output
Output Control to Y
16.5
19.5
ns
t
PZL
Output Enable Time to LOW Level Output
Output Control to Y
18
21
ns
t
PHZ
Output Disable Time to HIGH Level Output (Note 5)
Output Control to Y
9.5
ns
t
PLZ
Output Disable Time to LOW Level Output (Note 5)
Output Control to Y
15
ns
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4
D
M
74S253
Dual
3-
ST
A
T
E
1-o
f
-
4
Li
ne Dat
a
Select
or/
M
ult
i
pl
exer
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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