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Электронный компонент: FAN5070

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www.fairchildsemi.com
Pentium is a registered trademark of Intel Corporation. Programmable Active Droop is a trademark of Fairchild Semiconductor.
REV. 1.0.1 8/7/01
Features
Output programmable in 25mV steps from 1.05V to
1.825V using a dynamically programmable integrated
5-bit DAC
Remote sense
Programmable Active Droop
TM
up to 200mV
Drives N-Channel MOSFETs
Overcurrent protection using MOSFET sensing
Overvoltage protection including startup
85% efficiency typical at full load
Integrated Power Good and Enable/Soft Start functions
Meets Intel VRM8.5 specifications using minimum
number of external components
20 pin SOIC package
Applications
Power supply for Pentium
III Platforms
VRM for Pentium III processor
Programmable power supply
Description
The FAN5070 is a synchronous mode DC-DC controller IC
which provides a highly accurate, programmable output volt-
age for platforms such as the Intel Pentium III, and provides a
complete solution for all Intel VRM8.5 CPU applications,
and for other high-performance processors. The FAN5070
features remote voltage sensing, independently adjustable
current limit, and a proprietary wide-range Programmable
Active Droop
TM
for optimal converter transient response and
VRM8.5 compliance. The FAN5070 uses a 5-bit D/A con-
verter to dynamically program the output voltage during oper-
ation from 1.05V to 1.825V in 25mV steps. The FAN5070
uses a high level of integration to deliver load currents in
excess of 28A from a 5V source with minimal external
circuitry. Synchronous-mode operation offers optimum
efficiency over the entire specified output voltage range. An
on-board precision low TC reference achieves 0.8% voltage
regulation without expensive external components. The
FAN5070 also offers integrated functions including open-
collector Power Good, Output Enable/Soft Start and current
limiting, and is available in a 20 pin SOIC package.
Block Diagram
VID3
VID2
VID1
12
VID0
GNDP
19
18
2
14
20
1
13
-
+
-
+
OSC
1.24V
Reference
Digital
Control
Power
Good
5-Bit
DAC
VID4
8 7 6 5 4
+5V
+12V
PWRGD
-
+
ENABLE/SS
VCC
GNDA
3
LODRV
HIDRV
VCCP
17
VCCA
+5V
16
15
OCL
-
+
R
D
R
S
-
+
FAN5070
High Performance Programmable Synchronous
DC-DC Controller
FAN5070
2
REV. 1.0.1 8/7/01
Pin Assignments
20
19
18
17
16
15
14
13
12
11
FAN5070
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VREF
NC
VCCP
LODRV
GNDP
VCCA
VFB
DROOP
ILIM
PWRGD
SS/ENABLE
NC
1
2
3
4
5
6
7
8
9
10
Pin Definitions
Pin Number
Pin Name
Pin Function Description
1
HIDRV
High Side FET Driver. Connect this pin to the gate of an N-channel MOSFET. The
trace from this pin to the MOSFET gate should be <0.5".
2
SW
High Side Driver Source and Low Side Driver Drain Switching Node. Together
with DROOP and ILIM pins allows FET sensing for V
CC
current.
3
GNDA
Analog Ground. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
4-8
VID4-0
Voltage Identification Code Inputs. These open collector/TTL compatible inputs
will program the output voltage over the ranges specified in Table 1.
9
VREF
DAC Output for Test Only. Do not load externally.
10, 11
NC
NC. No Connect.
12
ENABLE/SS
Output Enable. A logic LOW on this pin will disable all outputs. An internal current
source allows for open collector control. This pin also doubles as soft start for all
outputs.
13
PWRGD
Power Good Flag. An open collector output that will be logic LOW if any output
voltage is not within 14% of the nominal output voltage setpoint.
14
ILIM
V
CC
Current Feedback. Pin 11 is used in conjunction with pin 2 as the input for the
V
CC
current feedback control loop. Layout of these traces is critical to system
performance. See Application Information for details.
15
DROOP
Droop Set. Use this pin to set magnitude of active droop.
16
VFB
Vcc Voltage Feedback. Pin 13 is used as the input for the V
CC
voltage feedback
control loop. See Application Information for details regarding correct layout.
17
VCCA
Analog V
CC
. Connect to system 5V supply and decouple with a 0.1F ceramic
capacitor.
18
GNDP
Power Ground. Return pin for high currents flowing in pin 17 (V
CCP
).
19
LODRV
V
CC
Low Side FET Driver. Connect this pin to the gate of an N-channel MOSFET
for synchronous operation. The trace from this pin to the MOSFET gate should be
<0.5".
20
VCCP
Power V
CC
. For all FET drivers. Connect to system 12V supply through a 33
, and
decouple with a 1F ceramic capacitor.
FAN5070
REV. 1.0.1 8/7/01
3
Absolute Maximum Ratings
Note 1: Component mounted on demo board in free air.
Recommended Operating Conditions
Supply Voltage V
CCP
to GND
15V
Supply Voltage V
CCA
to GND
13.5V
Voltage Identification Code Inputs, VID0-VID4
VCCA
All Other Pins
13.5V
Junction Temperature, T
J
150C
Storage Temperature
-65 to 150C
Lead Soldering Temperature, 10 seconds
300C
Thermal Resistance Junction-to-case,
1
JA
75C/W
Parameter
Conditions
Min.
Typ.
Max.
Units
Supply Voltage V
CCA
4.50
5
5.25
V
Input Logic HIGH
2.0
V
Input Logic LOW
0.8
V
Ambient Operating Temperature
0
70
C
Output Driver Supply, V
CCP
10.8
12
13.2
V
Electrical Specifications
(V
CCA
= 5V, V
CCP
= 12V, V
OUT
= 1.425V, and T
A
= +25C using circuits in Figure 1, unless otherwise noted.)
The denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Min.
Typ.
Max. Units
Output Voltage
See Table I
1.05
1.825
V
Output Current
28
A
Initial Voltage Setpoint
I
LOAD
= 0.8A, V
VID
= 1.425V
1.453
1.465
1.477
V
Output Temperature Drift
T
A
= 0 to 70C, V
VID
= 1.425V
-6
mV
Line Regulation
V
IN
= 4.75V to 5.25V
+10
mV/V
Internal Droop Impedance
3
I
LOAD
= 0.8A to 30A
13.0
14.4
15.8
K
Maximum Programmable Droop
200
mV
Output Ripple
20MHz BW, I
LOAD
= 28A
20
mVpk
Total Output Variation, Steady State
1
V
VID
= 1.425V
3
1.360
1.490
V
Total Output Variation, Transient
2
I
LOAD
= 0.8A to I
max
, V
VID
= 1.425V
1.335
1.515
V
Short Circuit Detect Current
45
50
60
A
Efficiency
I
LOAD
= 18A, V
VID
= 1.425V
83
%
Output Driver Rise & Fall Time
See Figure 3
50
nsec
Output Driver Deadtime
See Figure 3
50
nsec
Duty Cycle
0
100
%
5V UVLO
3.76
4
4.24
V
12V UVLO
7.65
8.5
9.35
V
Oscillator Frequency
255
300
345
kHz
PWRGD Threshold
4
Switcher
Logic HIGH [V
VID
+ 85mV]
Logic LOW [V
VID
155mV]

88
80
112
120
%
PWRGD Delay Switcher
HIGH
LOW
6
sec
PWRGD Hysteresis Switcher
25
mV
FAN5070
4
REV. 1.0.1 8/7/01
Notes:
1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is
measured at the converter's VFB sense point.
2. As measured at the converter's VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5m
trace resistance between the converter's output capacitors and the CPU. Remote sensing should be used for optimal
performance.
3. Using the VFB pin for remote sensing of the converter's output at the load, and the appropriate droop, the converter will be
in compliance with Intel's VRM 8.5 specification. If Intel specifications on maximum plane resistance from the converter's
output capacitors to the CPU are met, the specifications at the capacitors will also be met.
Table 1. Output Voltage Programming Codes for FAN5070
Note:
1. 0 = processor pin is tied to GND.
1 = processor pin is pulled up to 3.3V.
VID25mV
VID3
VID2
VID1
VID0
Nominal V
OUT
0
0
1
0
0
1.050V
1
0
1
0
0
1.075V
0
0
0
1
1
1.100V
1
0
0
1
1
1.125V
0
0
0
1
0
1.150V
1
0
0
1
0
1.175V
0
0
0
0
1
1.200V
1
0
0
0
1
1.225V
0
0
0
0
0
1.250V
1
0
0
0
0
1.275V
0
1
1
1
1
1.300V
1
1
1
1
1
1.325V
0
1
1
1
0
1.350V
1
1
1
1
0
1.375V
0
1
1
0
1
1.400V
1
1
1
0
1
1.425V
0
1
1
0
0
1.450V
1
1
1
0
0
1.475V
0
1
0
1
1
1.500V
1
1
0
1
1
1.525V
0
1
0
1
0
1.550V
1
1
0
1
0
1.575V
0
1
0
0
1
1.600V
1
1
0
0
1
1.625V
0
1
0
0
0
1.650V
1
1
0
0
0
1.675V
0
0
1
1
1
1.700V
1
0
1
1
1
1.725V
0
0
1
1
0
1.750V
1
0
1
1
0
1.775V
0
0
1
0
1
1.800V
1
0
1
0
1
1.825V
FAN5070
5
REV. 1.0.1 8/7/01
Typical Operating Characteristics
(V
CCA
= 5V, V
CCP
= 12V, and T
A
= +25C using circuit in Figure 1, unless otherwise noted.)
Vout (V)
1.48
1.46
1.44
1.42
1.4
1.38
1.36
1.34
0
3
6
9
12
15
18
21
24
28
Output Current (A)
Droop,Circuit of Fig.1
Vcpu Efficiency vs.Output Current
65
70
75
80
85
90
2
4
6
8
10
12
14
16
18
20
22
24
26
28
Output Current (A)
Efficiency (%)
Output Ripple, 1.425 @ 28A
V
CPU
(20mV/div)
Time (2 s/division)
Transient Response, 28A to 0.1A
V
CPU
(50mV/div)
Time (20 s/division)
1.515V
1.425V
1.335V
Transient Response, 0.1A to 28A
V
CPU
(50mV/div)
Time (20 s/division)
1.515V
1.425V
1.335V
Switching Waveforms, 28A Load
5V/div
5V/div
Time (20 s/division)
HIDRV
pin
LODRV
pin