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Электронный компонент: FAN7310

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2004 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.1
Features
High Efficiency Single Stage Power Conversion
Wide Input Voltage Range 5V to 24V
Back Light Lamp Ballast and Soft Dimming
Reduce External Components
Precision Voltage Reference Trimmed to 2%
ZVS full-bridge topology
Soft Start
PWM Control at fixed frequency
Analog and Burst Dimming Function
Synchronizable Switching Frequency With An External
Signal
Open Lamp Protection
Open Lamp Regulation
20 Pin SSOP
Description
The FAN7310 provides all the control functions for a
series parallel resonant converter and also contains a pulse
width modulation (PWM) controller to develop a supply
voltage. Typical operating frequency range is between
30kHz and 250kHz depending on the CCFL and the
transformer's characteristics.
The FAN7310 has a patent-pending on new phase-shift
control.
20-SSOP
1
FAN7310
LCD Back Light Inverter Drive IC
FAN7310
2
Internal Block Diagram
BDIM
-
+
+
S_S
EA_OUT
OSCILLATOR
RT
Error Amp.
EA_IN
6uA
-
+
CT
max. 2V
min. 0.5V
ADIM
OUTB
OUTA
OUTC
OUTD
-
+
VIN
2.5VREF
ENA
UVLO 5V
UVLO
REF
BCT
+
-
max. 2V
min. 0.5V
OLR
-
+
2V
-
+
1.4V
Solr
Q
Q
SET
CLR
S
R
UVLO
2V
OLP
-
+
PGND
Sburst
Voltage
Reference
&
Internal
Bias
VIN
1.4uA
2.7V
UVLO
Output
Driver
Output
Control
Logic
AGND
S_S
Solr 105uA
Sburst 85uA
Output
Driver
SYNC
+
FAN7310
3
Pin Assignments
Pin Definitions
No
Name
Function Description
No
Name
Function Description
1
OLP
Open Lamp Protection
11
BCT
Burst Dimming Timing Capacitor
2
OLR
Open Lamp Regulation
12
RT
Timing Resistor
3
ENA
Enable Input
13
CT
Timing Capacitor
4
S_S
Soft Start
14
OUTD
NMOSFET Drive Output D
5
GND
Analog Ground
15
OUTC
PMOSFET Drive Output C
6
REF
2.5V Reference Voltage
16
PGND
Power Ground
7
ADIM
Analog Dimming Input
17
VIN
Supply Voltage
8
BDIM
Burst Dimming Input
18
OUTA
PMOSFET Drive Output A
9
EA_IN
Error Amplifier Input
19
OUTB
NMOSFET Drive Output B
10
EA_OUT
Error Amplifier Output
20
SYNC
Sychronization Input/Output
FAN7310
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
OLP
OLR
ENA
S_S
OUTC
REF
ADIM
BDIM
EA_IN EA_OUT
SYNC
OUTB
OUTA
VIN
PGND
OUTD
CT
RT
BCT
GND
FAN7310
4
Absolute Maximum Ratings
For typical values Ta=25
C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with
-25
C
Ta
85
C and 5V
Vcc
24V, unless otherwise specified.
Note:
1. Thermal resistance test board
Size: 76.2mm * 114.3mm * 1.6mm(1S0P)
JEDEC standard: JESD51-3, JESD51-7
2. Assume no ambient airflow
Characteristics
Symbol
Value
Unit
Supply Voltage
V
CC
5 ~ 24
V
Operating Temperature Range
Topr
-25 ~ 85
C
Storage Temperature Range
Tstg
-65 ~ 150
C
Thermal Resistance Junction-Air (Note1,2)
R
JA
112
C/W
Power Dissipation
Pd
1.1
W
FAN7310
5
Electrical Characteristics
For typical values Ta=25
C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with
-25
C
Ta
85
C and 5V
Vcc
24V, unless otherwise specified.
Characteristics
Symbol
Test Condition
Min.
Typ.
Max.
Unit
REFERENCE SECTION
Line Regulation
Vref
5
V
CC
24V
-
2
25
mV
2.5V Regulation Voltage
V25
-
2.45
2.5
2.55
V
OSCILLATOR SECTION(MAIN)
Oscillation Frequency
fosc
Ta = 25
C, Ct = 270pF
Rt = 18k
108
115
122
kHz
Ct = 270pF, Rt = 18k
106
115
124
CT High Voltage
Vcth
-
-
2.0
-
V
CT Low Voltage
Vctl
-
-
0.5
-
V
OSCILLATOR SECTION(BURST)
Oscillation Frequency
fosc
Ctb = 10nF, Rt=18k
195
225
255
Hz
BCT High Voltage
Vbcth
-
-
2
-
V
BCT Low Voltage
Vbctl
-
-
0.5
-
V
ERROR AMP SECTION
Open Loop Gain
-
80
-
dB
Unit Gain Bandwidth
-
1.5
-
MHz
Feedback Output High Voltage
Veh
EA_IN = 0V
-
2.5
-
V
Output Sink Current
lsin
EA_OUT = 1.5V
-
-
-1
mA
Output Source Current
lsur
EA_OUT = 1.5V
1
-
-
mA
EA_IN Driving Current On OLR
Iolr
75
105
135
uA
EA_IN Driving Current On Burst Dimming
Iburst
61
85
109
uA
Feedback High Voltage On Burst Dimming
Vfbh
R(EA_IN) = 60k
Va+0.1 Va+0.4 Va+0.7
V
SOFT START SECTION
Soft Start Current
I
SS
S_S=2V
4
6
8
uA
Soft Start Clamping Voltage
Vssh
-
-
5
-
V
PROTECTION SECTION
Open Lamp Protection Voltage
Volp
-
1.75
2
2.25
V
Open Lamp Regulation Voltage
Volr
-
1.75
2
2.25
V
Open Lamp Protection Charging Current
Iolp
0.7
1.4
2.1
UNDER VOLTAGE LOCK OUT SECTION
Start Threshold Voltage
Vth
-
-
-
5
V
Start Up Current
Ist
V
CC
= Vth-0.2
-
130
-
uA
Operating Supply Current
Iop
V
CC
= 12V
-
1.5
-
mA
Stand-by Current
Isb
V
CC
= 12V
-
200
-
uA
ON/OFF SECTION
On State Input Voltage
Von
-
2
-
5
V
Off Stage Input Voltage
Voff
-
-
-
0.7
FAN7310
6
Electrical Characteristics
(Continued)
For typical values Ta=25
C, Vcc=12V and for min/max values Ta is the operating ambient temperature range with
-25
C
Ta
85
C and 5V
Vcc
24V, unless otherwise specified.
Characteristics
Symbol
Test Condition
Min.
Typ.
Max.
Unit
OUTPUT SECTION
PMOS Gate High Voltage
Vpdhv
V
CC
= 12V
-
Vcc
-
V
PMOS Gate Low Voltage
Vphlv
V
CC
= 12V
Vcc-10.5 Vcc-8.5 Vcc-6
NMOS Gate Drive Volgate
Vndhv
V
CC
= 12V
6
8.5
10.5
V
NMOS Gate Drive Volgate
Vndhv
V
CC
= 12V
-
0
-
PMOS Gate Voltage With UVLO
Activated
Vpuv
V
CC
= Vth-0.2
Vcc-0.3
-
-
V
NMOS Gate Voltage With UVLO
Activated
Vnuv
V
CC
= Vth-0.2
-
-
0.3
V
Rising Time
Tr
V
CC
= 12V
-
200
500
ns
Falling Time
Tf
V
CC
= 12V
-
200
500
ns
MAX./MIN OVERLAP
Min. Overlap between diagonal
switches
fosc=100KHz
-
0
-
%
Max. Overlap betwwen diagonal
switches
fosc=100KHz
-
100
-
%
DELAY TIME
PDR_A/NDR_B
Rt=18k
-
450
-
ns
PDR_C/NDR_D
Rt=18k
-
450
-
ns
FAN7310
7
Function Description
UVLO : The under voltage lockout circuit guarantees
stable operation of the IC's control circuit by stopping
and starting it as a function of the Vin value. The UVLO
circuit turns on the control circuit when Vin exceeds 5V.
When Vin is lower than 5V, the IC's standby current is
less than 200uA.
ENA : Applying the voltage higer than 2V to ENA pin
enables the operation of the IC. Applying to the voltage
lower than 0.7V to ENA pin will disable the operation of
the inverter.
Soft start :The soft start function is provided that S_S
pin is connected through a capacitor to GND. A soft
start circuit ensures a gradual increase in the input and
output power. The capacitor connected to S_S pin
determines the rate of rise of the duty ratio. It is
charged by a current source of 6uA.
Main oscillator : Timing capacitor CT are charged by
the reference current source, formed by the timing
resistor Rt whose voltage is regulated at 1.25V. The
sawtooth waveform charges up to 2V. Once reached,
capacitors begin discharging down to 0.5V. Next timing
capacitors start charging again and a new switching
cycle begins. The main frequency can be programmed
with adjusting the values of Rt and CT. The main fre-
quency can be calculated as below.
Burst oscillator & burst dimming :Timing capacitor
BCT are charged by the reference current source,
formed by the timing resistor Rt whose voltage is regu-
lated at 1.25V. The sawtooth waveform charges up to
2V. Once reached, capacitors begin discharging down
to 0.5V. Next timing capacitors start charging again and
a new switching cycle begins. The burst dimming fre-
quency can be programmed with adjusting the values
of Rt and BCT. The burst dimming frequency can be
calculated as below.
The burst dimming frequency should be greater than
120Hz to avoid visible flicker.
To compare the input of BDIM pin with the 0.5~2V trian-
gular wave of burst oscillator makes the PWM pulse for
burst dimming. The PWM pulse controls EA_OUT's
voltage by summing 85uA into EA_IN pin.
fop =
19
32 RT CT
-------------------------------
fburst =
3.75
64 RT BCT
-----------------------------------
FAN7310
8
Open lamp regulation & open lamp protection : It is
necessary to suspend power stage operation if an open
lamp occurs, because the power stage has high gain.
When a voltage higher than 2V is applied to the OLR
pin, the part enters the regulation mode and controls
EA_OUT voltage to limit the lamp voltage by summing
105uA into the feedback node. At the same time, the
OLP capacitor, connected to the OLP pin, is charged by
the 1.4uA internal current source. Once reached to 2V,
IC enters shut down where all the output is high.
SYNC: This pin is used as the frequency synchroniza-
tion. The switching frequency can be synchronized with
an external control signal.
OUTPUT DRIVES: The four output drives are designed
so that switches A and B, C and D never turn on
simultaneously. The OUTA-OUTB pair is intended to
drive one half-bridge in the external power stage. The
OUTC-OUTD pair will drive the other half-bridge.
FAN7310
9
Timing Diagram
FAN7310 use the improved phase-shfit control full-brdige to drive CCFL. As a result, the temperature difference
between the left leg and the right legs is almost zero. The detail timing is shown as bellow.
CT
SYNC
POUT A
NOUT B
POUT C
NOUT D
EA_OUT
T
T1
FAN7310
10
Typical Application Circuit
R1
330k
0
OUTD
C6 1u
0
0
C28
10n
IC1 FAN7310
S_S
GND
REF
OLR
ENA
BDIM
OLP
VIN
OUTA
PGND
OUTB
SYNC
CT
OUTC
ADIM
EA_IN
EA_OUT
OUTD
RT
BCT
OLP1
0
R15
2k
OUTB
C4 6.8n
0
0
0
CCFL
REF
0
FB
C21
10n
OLR
C7
10u
C3
4.7n
VCC
0
M1
D11
D1N4148
0
OLP1
BAV99
0
R26
10k
C25
100u
0
R5 27k
C19
2.2n
D4
0
0
R9
8.2k
0
R8
100k
0
D1
D1N4148
OLP
FDS8958A
C2
1u
OLR
D6
M2
R24
10k
R16
1.5k
C1 1u
FDS8958A
C9
1u
R22
10k
0
C10
15p
DIM(0~3.3V)
0
C26
1u
C14
20n
C27
1u
REF
0
R14
100k
OUTA
0
R6
100k
0
0
0
0
0
R3
20k
R25
10k
FB
0
C16
2.2n
OUTC
R2
56k
BAV99
0
R4
22k
Q1
KST2222
C22
1u
ENA
TX1
C5 220p
FAN7310
11
Mechanical Dimensions
Package
Dimensions in millimeters
20-SSOP
FAN7310
10/6/04 0.0m 001
Stock#DSxxxxxxxx
2004 Fairchild Semiconductor Corporation
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
Ordering Information
Product number
Package
Operating Temperature
FAN7310G
20-SSOP
-25
C ~ 85
C