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Электронный компонент: FAN7680M

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2003 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.0
Features
PC Power Supply Output Monitor Circuitry
Few External Components
Over Voltage Protection for 3.3V, 5V and 12V(Vcc)
Outputs
Under Voltage Protection for 3.3V, 5V and 12V(Vcc)
Outputs with Delay Time
Fault Protection Output with Open Drain Output
Open Drain Power Good Output
300ms Power Good Delay
38ms PSON On/Off Debounce
73us Debounce
2.3ms PSON to FPO Turn Off Delay
Latch Function Controlled by PSON and Protection
Inputs
Typical Application
PC Power Supply
OVP
The FAN7680 has OVP functions for +3.3V, +5V,
+12V(Vcc) outputs. This block is made up of three compara-
tors with two inputs and resistor dividers. One input of a
comparator is connected to a reference voltage and another
input is connected to a resistor divider.
UVP
The FAN7680 also has UVP functions for +3.3V, +5V,
+12V(Vcc) outputs. This block is made up of three compara-
tors with two inputs and resistor dividers. One input of a
comparator is connected to a reference voltage and another
input is connected to a resistor divider.
PSON
The remote on/off(PSON) section is for controlling the
SMPS externally. When a high signal is applied to the PSON
input, the FPO signal becomes a high state and all secondary
outputs are grounded. The remote on/off signal is transferred
with some on/off debounce time.
Description
The FAN7680 is a complete output supervisory circuitry
intended for use in the secondary side of a switched mode
power supply. It provides over voltage protection (OVP),
under voltage protection (UVP), fault protection output
(FPO), remote On/Off (PSON), latch, internal delay circuits
and power good signal generator to monitor and control the
output of the switching power supply system. As for output
control, power good output(PGO) and fault protection out-
put(FPO) are included. It directly senses all the output rails
for OVP and UVP without external dividers. The FAN7680
offers a simple and cost effective solution with minimum
number of external components and greatly reduces PCB
board space for power supply.
FPO
The FPO(Fault Protection Output) is a signal which indicates
the system fault condition according to protection signals.
When a fault state is occured, the FPO signal becomes high
and the PGO signal becomes low and the main power is to be
turned off.
Normal State; "Low"
Fault State; "High"
PGO
The power good signal generator provides a signal according
to output voltage conditions of a power supply for safe oper-
ation of a secondary system. The power good output should
be low state before the output voltage is out of regulation at
turn-off of the input power switch.
Normal State ; "High"
Fault State ; "Low"
8-DIP
8-SOP
1
1
FAN7680
PC Power Supply Outputs Monitoring IC
FAN7680
2
Internal Block Diagram
Typical Applicatin Circuit
Debounce
73us
S
R
Q
Debounce
73us
Delay
300ms
3.6V
Q
UVP
PSON
H
L
L
L
L
L
L
H
H
H
L
L
L
L
H
L
PSON
H
PGI_O
clr
R
R
R
Delay
2.3ms
clr
POR
REF.
Start-up
Vref
Reset
Vcc
Debounce
38ms
PSON
L
L
L
Vcc
Vref
3.6V
3.6V
150uA
Oscillator
CLK
CLK
CLK
CLK
CLK
CLK
R
UVP
OVP
L
Vref
L
7
6
5
Delay
75ms
PGI_O
H
L
L
clr
CLK
V
CC
VS5
VS33
1
PGI
2
GND
8
4
3
PGO
PSON
FPO
R
5 V s b
P S O N
P G I
P G O
+ 1 2 V
5 V s b
+ 5 V
+ 3 . 3 V
F A N 7 6 8 0
1
2
3
4 PSON
FPO
PGO
GND
PGI
V
CC
VS5
VS33
8
6
5
7
FAN7680
3
Pin Assignments
Pin Definitions
Pin Number
Pin Name
I/O
Pin Function Description
1
PGI
I
Power Good Input
2
GND
-
Ground
3
FPO
O
Low Active Fault Protection Output, Open Drain Output Stage
4
PSON
I
Remote On/Off Control Input
5
VS33
I
3.3V Output Voltage Input
6
VS5
I
5V Output Voltage Input
7
V
CC
I
Supply Voltage and 12V Output Voltage Input
8
PGO
O
Power Good Output Signal
1
2
3
4
8
7
6
5
PSON
FPO
PGO
GND
PGI
V
CC
VS5
VS33
FAN7680
YW
W
YWW :Work Week Code
FAN7680
4
Absolute Maximum Ratings
(Note2,3)
Recommended Operating Conditions
(Note2,3)
Parameter
Symbol
Value
Unit
Supply Voltage
V
CC
16
V
Supply Current
I
CC
1
mA
Input Voltage
V
PSON
, VS5
8
V
VS33, V
PGI
Output Voltage
V
PGO
8
V
V
FPO
16
Operating Temperature
T
O
-40 ~ +125
C
Storage Temperature
T
S
-65 ~ +150
C
Power Dissipation
P
D
1
W
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Supply Voltage
V
CC
4
15
V
Input Voltage
V
PSON
, VS5,
7
V
VS33, V
PGI
Output Voltage
V
PGO
7
V
V
FPO
15
V
Output Sink Current
I
FPO
30
mA
I
PGO
10
mA
Supply Voltage Rising Time
tr
Note1
1
ms
FAN7680
5
Electrical Characteristics
(V
CC
= 5V, Ta=25
C, unless otherwise specified)
Over Voltage Protection, Under Voltage Protection and FPO
PGI and PGO
PSON Control
Total Device
Timing Characteristics
(V
CC
=5V, Ta=25
C, unless otherwise specified)
Note
1. V
CC
slew rate must be less than 14V/ms.
2. All voltages are measured with respect to the ground pin, unless otherwise specified.
3.The Absolute Maximum Ratings indicate the limits that if exceed, damage to the device may occur. Recommended Operating
Conditions indicate conditions in which the device is functional, but do not guarantee specific performance limits.
4. This parameter, although guaranteed over the Timing Characteristics, is not 100% tested in production.
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Over Voltage Threshold
VS33
OV
3.9
4.1
4.3
V
VS5
OV
5.8
6.1
6.4
12V(V
CC
)
OV
13.3
13.8
14.3
Under Voltage Threshold
VS33
UV
2.55
2.69
2.83
V
VS5
UV
4.1
4.3
4.5
12V(V
CC
)
UV
8.8
9.3
9.8
Leakage Current(
FPO
)
I
LKG1
V
FPO
= 5V
-
-
5
uA
Low Level Output Voltage(FPO)
V
OLI
Isink=10mA
-
-
0.3
V
Isink=30mA
-
-
0.7
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Input Threshold Voltage(PGI)
V
PGI
1.16
1.20
1.24
V
Leakage Current(PGO)
I
LKG2
V
PGO
= 5V
-
-
5
uA
Low Level Output Voltage(PGO)
V
OL2
Isink=10mA
-
-
0.4
V
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Input Pull-up Current
V
PSON
= 0V
-
150
-
uA
High-Level Input Voltage
2.4
-
-
V
Low-Level Input Voltage
-
-
1.2
V
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
I
CC
V
PSON
= 5V
-
-
1
mA
Characteristic
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Debounce Time(PSON)
t
b1
25
38
51
ms
Noise Debounce Time
t
b2
Note 4
50
73
100
us
PGO Delay Time(PGI to PGO)
t
d1
200
300
410
ms
Internal UVP Delay Time
t
d2
FPO goes low and
every time PGI > 1.20
51
75
102
ms
PSON Off to FPO Delay Time
t
d3
t
b1
+1.6 t
b1
+2.3 t
b1
+3.2
ms
FAN7680
6
Typical Characteristics
0
1
2
3
4
5
6
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
PSON (V)
FP
O
(
V
)
0
1
2
3
4
5
6
1.14
1.16
1.18
1.20
1.22
1.24
PGI (V)
P
GO (
V
)
0
1
2
3
4
5
6
2.83
2.79
2.75
2.71
2.67
2.63
2.59
2.55
VS33 (V)
FP
O
(
V
)
0
1
2
3
4
5
6
3.90 3.94 3.98 4.02 4.06 4.10 4.14 4.18 4.22 4.26 4.30
VS33 (V)
FP
O
(
V
)
0
1
2
3
4
5
6
4.50
4.45
4.40
4.36
4.31
4.26
4.21
4.16
4.12
VS5 (V)
FP
O
(
V
)
0
1
2
3
4
5
6
5.80
5.88
5.96
6.04
6.12
6.20
6.28
6.36
VS5 (V)
FP
O
(
V
)
Figure 1. PSON Threshold Voltage
Figure 2. PGI Threshold Voltage
Figure 3. +3.3V UVP Voltage
Figure 4. +3.3V OVP Voltage
Figure 5. +5V UVP Voltage
Figure 6. +5V OVP Voltage
FAN7680
7
Typical Characteristics
0
1
2
3
4
5
6
9.80
9.60
9.40
9.20
9.00
8.80
Vcc (V)
FP
O
(
V
)
0
1
2
3
4
5
6
13.30
13.50
13.70
13.90
14.10
14.30
14.50
Vcc (V)
FP
O (
V
)
Figure 7. +12V UVP Voltage
Figure 8. +12V OVP Voltage
FAN7680
8
Timing Chart
1) AC Input ON/OFF - Normal State
2) PSON ON/OFF - Normal State
- Vcc : Supply Voltage
- POR : Power On Reset
- PSON : Power Supply On/Off
- FPO : Fault Protection Output
- PGI : Power Good Input
- OUT : Output Voltages
- PGO : Power Goood Output
VCC
PGI
FPO
PSON
OUT
PGO
POR
t
b1
AC Input
Enable
AC Input
Disable
UVP
Threshold
t
b2
+t
d1
PGI
FPO
PSON
OUT
PGO
t
d3
t
b1
+t
b2
t
b1
UVP
Threshold
t
b2
+t
d1
FAN7680
9
3) Under Voltage at Normal State
4) Under Voltage at AC Input ON
PGI
FPO
PSON
OUT
PGO
t
b2
t
b1
UVP
Threshold
t
b2
+t
d1
UVP
Threshold
Latch
VCC
PGI
FPO
PSON
OUT
PGO
POR
t
b1
AC Input
Enable
PGI
Threshold
t
b2
+t
d2
UVP
Threshold
t
b2
+t
d1
Latch
FAN7680
10
5) Under Voltage at PSON ON/OFF
6) Over Voltage at PSON ON/OFF
PGI
FPO
PSON
OUT
PGO
t
d3
t
b1
+t
b2
UVP
Threshold
t
b2
+t
d1
t
b1
PGI
Threshold
t
b2
+t
d2
Latch
PGI
FPO
PSON
OUT
PGO
t
b2
t
b1
UVP
Threshold
t
b2
+t
d1
OVP
Threshold
Latch
FAN7680
11
Application Information
Power Good(PGO) and Power Good Delay
A PC power supply is commonly designed to provide the motherboard with a power good signal, which is defined by the com-
puter manufactures. If the +3.3V, +5V, and +12V outputs are above the undervoltage threshold limit, the PC power supply
makes the power good signal high after some delay. At this time the power supply should be able to provide enough power to
assure continuous operation within the specification. Conversely, when one of the +3.3V, +5V, or +12V outputs falls below the
undervoltage threshold or rise above the overvoltage threshold, or when main power has been turned off for a sufficiently long
time so that power supply operation is no longer assured, a PGO signal will be a low state.
The AC input, power good(PGO), remote on/off(PSON), and +3.3V/+5V/+12V supply rails are shown in figure 1.
Although there is no requirement for specific timing parameters, the following signal timings are recommended :
-T1(Power On Time) : T1 <
500ms
-T2(Rise Time) : 0.1ms
T2 20ms
-T3(PGO Delay) : 100ms < T3 <500ms
-T4(PGO Delay Risetime) : T4
10ms
-T5(AC Loss to PGO Hold-Up Time) : T5
16ms
-T6(Power Down Warning) : T6
1ms
Furthermore, motherboards should be designed to comply with the above recommended timing range. If timings other than
these are implemented or required, that information should be clearly specified.
The FAN7680 provides a power good(PGO) signal for the +3.3V, +5V and +12V(Vcc) supply voltage rails and a separate
power good input(PGI). An internal delay circuit is used to generate a 300ms power good delay.
If voltages at PGI(+1.2V), VS33(+3.3V), VS5(+5V), and Vcc(+12V) rise above the undervoltage threshold, the open drain
power good output(PGO) will go high after a delay of 300ms. When the PGI voltage or any of +3.3V, +5V, and +12V rails
drops below the undervoltage threshold, the PGO signal will be disabled immediately.
Power Supply Remote On/Off(PSON) and Fault Protect Output(FPO)
Since the latest personal computer generation focuses on easy turn on and power saving functions, a PC power supply will
require two characteristics. One is a dc power supply remote on/off function; the other is standby voltage to achieve very low
power consumption of the PC power supply. Thus, the main power needs to be shut down.
The power supply remote on/off(PSON) is an active-low signal that turns on all of the main power rails including the +3.3V,
+5V, and +12V power rails. When this signal is held high by the PC motherboard or left open circuited, the signal of the fault
protect output(FPO) also goes high. Thus, the main power rails can not deliver power and are held at 0V.
When the FPO signal is held high due to an fault condition, the fault status will be latched and the outputs of the main power
rails can not deliver power and are held at 0V. Toggling the PSON input signal from low to high will reset the fault protection
latch. During this fault condition only the standby power is not affected.
When the PSON input signal goes from high to low or low to high, the 38ms debounce block will be active to avoid that a
glitch on the PSON input may disable/enable the FPO output. When the PSON is set low, the undervoltage function is disabled
T1
T5
T5
T4
T3
T2
PGO
+12VDC
+5VDC
+3.3VDC
PSON
VAC
95%
10%
Figure 1. Timing Diagram
FAN7680
12
during 75ms to avoid turn-on failure. At turn-off, there is an additional delay of 2.3ms from PSON to FPO.
Power should be delivered to the rails only when the PSON signal is held at ground potential, thus the FPO becomes a low
state after a debounce of 38ms. The FPO pin can be connected to +5V(or up to +15V) through a pull-up resistor.
Under Voltage Protection(UVP)
The FAN7680 provides undervoltage protection(UVP) for the +3.3V, +5V, and +12V power rails. When an undervoltage con-
dition appears at one of the VS33(+3.3V), VS5(+5V), or Vcc(+12V) input pins for more than 73us, the PGO goes low and
FPO output goes high. Also, this fault condition will be latched until the PSON is toggled from low to high or the Vcc falls
below a minimum operating voltage.
When the power supply is turned on by the AC input or PSON, an internal UVP delay is 75ms. But at normal state an UVP
delay time is a 73us debounce time. The need for undervoltage protection is often overlooked in off-line switching power sup-
ply system design. But it is very important in battery powered or hand-held equipment since the TTL or CMOS logic often
malfunctions under UVP condition.
Over Voltage Protection(OVP)
The overvoltage protection(OVP) of the FAN7680 monitors +3.3V, +5V, and +12V(the +12V output is sensed via the Vcc
pin). When an overvoltage condition appears at one of the +3.3V, +5V, or +12V input pins for more than 73us, the FPO output
goes high and the PGO goes low. Also, this fault condition will be latched until the PSON is toggled from low to high or Vcc
drops below a minimum operating voltage. During fault conditions, most power supplies have the potential to deliver higher
output voltages than those normally specified or required. In unprotected equipment, it is possible for output voltages to be
high enough to cause internal or external damage to the system. To protect the system under these abnormal conditions, it is
common practice to provide overvoltage protection within the power supply.
Because TTL and CMOS circuits are very vulnerable to overvoltage, it is becoming industry standard to provide overvoltage
protection on all +3.3V, +5V, and +12V outputs. Therefore, not only the +3.3V and +5V rails for the logic circuits on the moth-
erboard need to be protected, but also the +12V peripheral devices such as the hard disk, flopply disk, and CD-ROM players
etc., need to be protected.
FAN7680
13
Mechanical Dimensions
Package
Dimensions in millimeters
8-DIP
FAN7680
14
Mechanical Dimensions
Package
Dimensions in millimeters
8-SOP
FAN7680
15
Ordering Information
Product Number
Package
Operating Temperature
FAN7680N
8DIP
-40C ~ +125C
FAN7680M
8SOP
FAN7680
6/23/03 0.0m 001
Stock#DSxxxxxxxx
2003 Fairchild Semiconductor Corporation
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instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
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device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
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