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Электронный компонент: FDC6432SH

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April 2003
2003 Fairchild Semiconductor Corp.
FDC6432SH Rev B (W)
FDC6432SH
12V P-Channel PowerTrench
MOSFET,
30V PowerTrench
SyncFET
General Description
This complementary P-Channel MOSFET with
SyncFET has been designed specifically to improve the
overall efficiency of DC/DC converters using either
synchronous or conventional switching PWM
controllers. It has been optimized for providing an
extremely low R
DS(ON)
in a small package.
Applications
DC/DC converter
Power management
Features
SyncFET
R
DS(ON)
= 90 m
@ V
GS
= 10 V
2.4 A, 30V
R
DS(ON)
= 105 m
@ V
GS
= 4.5 V
P channel
R
DS(ON)
= 90 m
@ V
GS
= 4.5 V
2.5 A, 12V
R
DS(ON)
= 125 m
@ V
GS
= 2.5 V
R
R
DS(ON)
= 220 m
@ V
GS
= 1.8 V
Fast switching speed.
High performance trench technology for extremely
low R
DS(ON)
D1
S2
G1
D2
S1
G2
SuperSOT -6
TM
Pin 1
SuperSOTTM-6
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol Parameter
Ratings
Units
Q1 (N)
Q2 (P)
V
DSS
Drain-Source
Voltage
30
12
V
V
GSS
Gate-Source
Voltage
16
8
V
I
D
Drain
Current
Continuous
(Note 1a)
2.4
2.5 A
Pulsed
7
7
Power Dissipation for Single Operation
(Note 1a)
1.3
P
D
(Note 1b)
0.7
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
100
C/W
(Note 1b)
175
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
60
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.432
FDC6432SH
7''
8mm
3000 units
FDC6432SH
3
2
1
4
5
6
Q1(N)
Q2(P)
D1,2


S1


D1,2
G2


S2


G1
FDC6432SH Rev B (W)
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol Parameter Test
Conditions
Q
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown
Voltage
V
GS
= 0 V,
I
D
= 1 mA
V
GS
= 0 V,
I
D
= 250 A
Q1
Q2
30
12
V
BV
DSS
T
J
Breakdown Voltage
Temperature Coefficient
I
D
= 1 mA, Ref to 25C
I
D
= 250 A, Ref to 25C
Q1
Q2
25
10
mV/C
I
DSS
Zero Gate Voltage Drain
Current
V
DS
= 24 V,
V
GS
= 0 V
V
DS
= 10 V, V
GS
= 0 V
Q1
Q2
500
1
A
I
GSS
Gate-Body
Leakage
V
GS
= 16 V, V
DS
= 0 V
V
GS
= 8 V,
V
DS
= 0 V
Q1
Q2
100
100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 A
Q1
Q2
1
0.4
1.5
0.7
3
1.5
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 1 mA, Ref to 25C
I
D
= 250 A, Ref to 25C
Q1
Q2
7
3
mV/C
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10V,
I
D
= 2.4A
V
GS
= 4.5V, I
D
= 2.2A
V
GS
=10V,I
D
=2.4A,T
J
=125C
Q1
75
85
100
90
105
140
m
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 4.5V, I
D
= 2.5A
V
GS
= 2.5V, I
D
= 2.0A
V
GS
= 1.8V, I
D
= 1.6A
V
GS
=4.5V,I
D
=2.5A,T
J
=125C
Q2
75
97
154
86
90
125
220
120
m
g
FS
Forward
Transconductance
V
DS
= 10 V,
I
D
= 1 mA
V
DS
= 5 V
I
D
= 2.5A
Q1
Q2
7
7
S
R
G
Gate
Resistance
V
GS
= 15 mV, f = 1.0 MHz
Q1
Q2
5
13
Dynamic Characteristics
C
iss
Input
Capacitance
Q1
Q2
270
514
pF
C
oss
Output
Capacitance
Q1
Q2
50
234
pF
C
rss
Reverse Transfer Capacitance
For Q1:
V
DS
=15V, V
GS
=0V, f=1MHz
For Q2:
V
DS
= 6V, V
GS
=0V, f=1MHz
Q1
Q2
20
167
pF
Switching Characteristics
(Note 2)
td(on)
Turn-on Delay Time
Q1
Q2
5
13
10
23
ns
tr
Turn-on Rise Time
Q1
Q2
8
12
16
22
ns
td(off)
Turn-off Delay Time
Q1
Q2
18
22
32
35
ns
tf
Turn-off Fall Time
For Q1:
V
DS
= 15 V, I
D
= 1 A,
V
GS
= 10 V, R
GEN
= 6
For Q2:
V
DS
= 10 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
Q1
Q2
1.2
29
2.4
46
ns
Qg
Total Gate Charge
Q1
Q2
2.5
5.7
3.5
8
nC
Qgs Gate-Source
Charge
Q1
Q2
0.7
1.2
nC
Qgd Gate-Drain
Charge
For Q1:
V
DS
= 15 V, I
D
= 2.4 A,
V
GS
= 5 V
For Q2:
V
DS
= 10 V, I
D
= 2.5 A,
V
GS
= 4.5 V
Q1
Q2
0.6
1.7
nC
FDC6432SH
FDC6432SH Rev B (W)
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol Parameter Test
Conditions
Q
Min
Typ
Max
Units
Drain-Source Diode Characteristics
V
SD
Drain-Source Diode Forward
Voltage
V
GS
= 0 V, I
S
= 0.7A, Note 2
V
GS
= 0 V, I
S
= 0.8A, Note 2
Q1
Q2
0.6
0.7
700
1200
mV
t
RR
Reverse
Recovery
Time
Q1
Q2
10
24
ns
I
RM
Maximum Reverse Recovery
Current
Q1
Q2
0.8
0.5
A
Q
RR
Reverse Recovery Charge
For Q1:
IF = 2.4A, dIF/dt = 300A/s
For Q2:
IF = 2.5A, dIF/dt = 100A/s
Q1
Q2
4
6
nC
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC
is guaranteed by design while R
CA
is determined by the user's board design.
a) 100C/W
when
mounted on a 1in
2
pad
of 2 oz copper
b) 175C/W
when
mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
FDC6432SH
FDC6432SH Rev B (W)
Typical Characteristics : Q1
0
2
4
6
8
0
1
2
3
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
V
GS
= 10V
6.0V
3.0V
3.5V
4.5V
2.5V
0.8
1
1.2
1.4
1.6
1.8
0
2
4
6
8
I
D
, DRAIN CURRENT (A)
R
DS
(
O
N)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 3.0V
4.5V
6.0V
4.0V
10V
5.0V
3.5V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(O
N)
,
NORMALI
Z
ED
DRAI
N-
SOURCE ON-
R
ESI
STANCE
I
D
= 2.4A
V
GS
= 10V
0.05
0.1
0.15
0.2
0.25
0.3
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS(O
N)
,
ON-
R
ESI
STANCE (
O
HM)
I
D
= 1.2A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
1
2
3
4
5
6
7
1
1.5
2
2.5
3
3.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
,
DRAI
N CURRENT
(
A
)
T
A
= -55
o
C
25
o
C
125
o
C
V
DS
= 5V
0.001
0.01
0.1
1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
I
S
,
REVERSE DRAI
N CURRENT (
A
)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6432SH
FDC6432SH Rev B (W)
Typical Characteristics : Q1
0
2
4
6
8
10
0
1
2
3
4
5
Q
g
, GATE CHARGE (nC)
V
GS
,
GATE-
S
OURCE VOLTAGE (
V
)
I
D
= 2.4A
V
DS
= 10V
15V
20V
0
100
200
300
400
0
5
10
15
20
25
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
iss
C
oss
f = 1 MHz
V
GS
= 0 V
C
rss
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
,
DR
AIN
CU
RR
EN
T (A
)
DC
10s
1s
100ms
100s
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
JA
= 175
o
C/W
T
A
= 25
o
C
10ms
1ms
0
2
4
6
8
10
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
JA
= 175C/W
T
A
= 25C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
R
JA
(t) = r(t) * R
JA
R
JA
= 175
o
C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDC6432SH
FDC6432SH Rev B (W)
Typical Characteristics : Q2
0
1
2
3
4
5
6
7
8
0
0.5
1
1.5
2
2.5
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRE
NT
(
A
)
V
GS
= -4.5V
-3.5V
-3.0V
-1.8V
-2.0V
-2.5V
-1.5V
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
0
1
2
3
4
5
6
7
8
-I
D
, DRAIN CURRENT (A)
R
DS(O
N)
,
NORMALI
Z
ED
DRAI
N-
SOURCE ON-
R
ESI
STANCE
V
GS
=-1.8V
-3.0V
-2.5V
-3.5V
-4.5V
-2.0V
Figure 12. On-Region Characteristics.
Figure 13. On-Resistance Variation with
Drain Current and Gate Voltage.
0.8
0.9
1
1.1
1.2
1.3
1.4
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(O
N)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= -2.5A
V
GS
= -4.5V
0.05
0.09
0.13
0.17
0.21
0.25
0.29
1
2
3
4
5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS
(
O
N)
, ON-
R
E
S
I
S
T
ANCE
(
O
HM)
I
D
= -1.3A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 14. On-Resistance Variation with
Temperature.
Figure 15. On-Resistance Variation with
Gate-to-Source Voltage.
0
1
2
3
4
5
6
7
8
0.5
1
1.5
2
2.5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRE
NT
(
A
)
T
A
= -55
o
C
25
o
C
125
o
C
V
DS
= -5V
0.0001
0.001
0.01
0.1
1
10
0
0.2
0.4
0.6
0.8
1
1.2
-V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
-I
S
,
REVERSE DRAI
N CURRENT (
A
)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 16. Transfer Characteristics.
Figure 17. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6432SH
FDC6432SH Rev B (W)
Typical Characteristics : Q2
0
1
2
3
4
5
0
1
2
3
4
5
6
7
Q
g
, GATE CHARGE (nC)
-V
GS
,
GATE-
S
OURCE VOLTAGE (
V
)
I
D
= -2.5A
V
DS
= -4V
-6V
-8V
0
100
200
300
400
500
600
700
800
0
3
6
9
12
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
ISS
C
OSS
C
RSS
f = 1 MHz
V
GS
= 0 V
Figure 18. Gate Charge Characteristics.
Figure 19. Capacitance Characteristics.
0.01
0.1
1
10
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
DC
1s
100ms
100
s
R
DS(ON)
LIMIT
V
GS
= -4.5V
SINGLE PULSE
R
JA
= 175
o
C/W
T
A
= 25
o
C
10ms
1ms
10s
0
2
4
6
8
10
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
JA
= 175C/W
T
A
= 25C
Figure 20. Maximum Safe Operating Area.
Figure 21. Single Pulse Maximum
Power Dissipation.
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
R
JA
(t) = r(t) * R
JA
R
JA
= 175
o
C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 22. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.

FDC6432SH
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
ImpliedDisconnect
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