FDD5202P
FDD5202P, Rev. A
FDD5202P
P-Channel, Logic Level, MOSFET
General Description
This P-Channel Logic level MOSFET is produced using
Fairchild Semiconductor's advanced process that has
been especially tailored to minimize the on state
resistance and yet maintain low gate charge for superior
switching performance.
Applications
DC/DC converter
Motor drives
L.D.O.
February 1999
PRELIMINARY
Features
-8 A, -60 V. R
DS(on)
= 0.3
@ V
GS
= -10 V
R
DS(on)
= 0.5
@ V
GS
= -4.5 V.
Low gate charge (15.5nC typical).
Fast switching speed.
1999 Fairchild Semiconductor Corporation
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
-60
V
V
GSS
Gate-Source Voltage
20
V
I
D
Drain Current
- Continuous
(Note 1)
-8
(Note 1a)
-2.3
- Pulsed
-15
A
Maximum Power Dissipation @ T
C
= 25
o
C
(Note 1)
39
T
A
= 25
o
C
(Note 1a)
2.8
P
D
T
A
= 25
o
C
(Note 1b)
1.3
W
T
J
, T
stg
Operating and Storage Junction Temperature Range
-55 to +150
C
Thermal Characteristics
R
JC
Thermal Resistance, Junction-to- Case
(Note 1)
3.2
C/W
R
JA
Thermal Resistance, Junction-to- Ambient
(Note 1b)
96
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDD5202P
FDD5202P
13''
16mm
2500
G
S
D
TO-252
S
D
G
FDD5202P
FDD5202P, Rev. A
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown
Voltage
V
GS
= 0 V, I
D
= -250
A
-60
V
BV
DSS
T
J
Breakdown Voltage
Temperature Coefficient
I
D
= -250
A, Referenced to 25
C
-60
mV/
C
I
DSS
Zero Gate Voltage Drain
Current
V
DS
= -48 V, V
GS
= 0 V
-1
A
I
GSSF
Gate-Body Leakage Current,
Forward
V
GS
= 20V, V
DS
= 0 V
100
nA
I
GSSR
Gate-Body Leakage Current,
Reverse
V
GS
= -20 V, V
DS
= 0 V
-100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250
A
-2
-2.3
-4
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= -250
A, Referenced to 25
C
3.2
mV/
C
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= -10 V, I
D
= -2.3 A
V
GS
= -10 V, I
D
= -2.3 A,T
J
=125
C
V
GS
= -4.5 V, I
D
= -1.8 A
0.205
0.340
0.313
0.300
0.510
0.500
I
D(on)
On-State Drain Current
V
GS
= -10 V, V
DS
= -5 V
-10
A
g
FS
Forward Transconductance
V
DS
= -5 V, I
D
= -2.3 A
3
S
Dynamic Characteristics
C
iss
Input Capacitance
560
pF
C
oss
Output Capacitance
130
pF
C
rss
Reverse Transfer Capacitance
V
DS
= -30 V, V
GS
= 0 V,
f = 1.0 MHz
35
pF
Switching Characteristics
(Note 2)
t
d(on)
Turn-On Delay Time
8
15
ns
t
r
Turn-On Rise Time
20
40
ns
t
d(off)
Turn-Off Delay Time
20
40
ns
t
f
Turn-Off Fall Time
V
DD
= -30 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 6
5
20
ns
Q
g
Total Gate Charge
15.5
22
nC
Q
gs
Gate-Source Charge
2.4
nC
Q
gd
Gate-Drain Charge
V
DS
= -30 V, I
D
= -2.3 A,
V
GS
= -10 V
4.7
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
-2.2
A
V
SD
Drain-Source Diode Forward
Voltage
V
GS
= 0 V, I
S
= -2.2 A
(Note 2)
-1
-1.3
V
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the drain tab.
R
JC
is guaranteed by design while R
JA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width
300
s, Duty Cycle
2.0%
a) R
JA
= 45oC/W when mounted
on a 1in2 pad of 2oz copper.
b) R
JA
= 96oC/W when mounted on
a 0.076 in2 pad of 2oz copper.
FDD5202P
FDD5202P, Rev. A
Typical Characteristics
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
0.6
0.8
1
1.2
1.4
1.6
1.8
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
D
S(O
N
)
, NO
R
MALI
ZE
D
D
RAI
N-
S
O
UR
CE
O
N
-
R
E
S
I
S
TANC
E
I
D
= -2.3A
V
GS
= -10V
0
3
6
9
12
15
0
2
4
6
8
10
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
,
DRAI
N
CURRE
NT (A)
-6V
-5.0V
-4.5V
-7.0V
V
GS
= -10V
-4.0V
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
0
3
6
9
12
15
-I
D
, DIRAIN CURRENT (A)
R
DS
(
O
N)
,
NO
RM
A
L
I
Z
E
D
DR
AI
N-S
O
URC
E
O
N
-R
E
S
I
S
TANC
E
V
GS
= -4.5V
-5.0V
-6.0V
-7.0V
-8.0V
-10V
0
0.2
0.4
0.6
0.8
3
4
5
6
7
8
9
10
-V
GS
, GATE TO SOURCE VOLTAGE (V)
R
D
S(O
N
)
,
O
N
-R
ESI
ST
A
N
C
E
(OH
M
)
I
D
= -1.5A
T
A
= 125
o
C
T
A
= 25
o
C
0.0001
0.001
0.01
0.1
1
10
100
0
0.4
0.8
1.2
1.6
2
-V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
-I
S
,
RE
V
E
R
S
E
DRAI
N
C
URRE
NT (
A
)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
0
2
4
6
8
10
0
2
4
6
8
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-I
D
,
DR
AIN
C
URR
E
NT
(
A
)
T
A
= -55
o
C
25
o
C
125
o
C
V
DS
= -5V
FDD5202P
FDD5202P, Rev. A
Typical Characteristics
(continued)
Figure 7. Gate-Charge Characteristics.
Figure 8. Capacitance Characteristics.
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient themal response will change depending on the circuit board design.
0.0001
0.001
0.01
0.1
1
10
100
300
0.0001
0.001
0.01
0.1
1
t , TIME (sec)
T
R
A
N
SI
EN
T
T
H
E
R
M
A
L
R
E
S
I
ST
A
N
C
E
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
r
(t),
N
O
R
M
A
LIZE
D
E
FFE
C
TIV
E
Duty Cycle, D = t / t
1
2
R (t) = r(t) * R
R =
96C/W
JA
JA
JA
T - T = P * R (t)
JA
A
J
P(pk)
t
1
t
2
0
20
40
60
0.01
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
PO
W
E
R
(
W
)
SINGLE PULSE
R
JA
= 96
o
C/W
T
A
= 25
o
C
0
2
4
6
8
10
0
4
8
12
16
20
Q
g
, GATE CHARGE (nC)
-V
GS
,
G
A
T
E-SOU
R
C
E
VOL
T
A
G
E
(
V
)
I
D
= -2.3A
V
DS
= -10V
-30V
-20V
0.01
0.1
1
10
100
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
,
DR
AIN
CU
RRE
NT
(
A
)
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
JA
= 96
o
C/W
T
A
= 25
o
C
DC
10S
1S
100ms
10ms
1ms
0
100
200
300
400
500
600
700
800
900
0
10
20
30
40
50
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAP
ACITA
NCE
(
p
F)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
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E
2
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TM
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