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Электронный компонент: FDH27N50

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2002 Fairchild Semiconductor Corporation
August 2002
FDH27N50 Rev. A2
FDH27N50
FDH27N50
27A, 500V, 0.19 Ohm, N-Channel SMPS Power MOSFET
Applications
Switch Mode Power Supplies(SMPS), such as
PFC Boost
Two-Switch Forward Converter
Single Switch Forward Converter
Flyback Converter
Buck Converter
High Speed Switching
Features
Low Gate Charge Qg results in Simple Drive Require-
ment
Improved Gate, Avalanche and High Reapplied dv/dt
Ruggedness
Reduced r
DS(ON)
Reduced Miller Capacitance and Low Input Capacitance
Improved Switching Speed with Low EMI
175C Rated Junction Temperature
Absolute Maximum Ratings
TC = 25
o
C unless otherwise noted
Thermal Characteristics
Symbol
Parameter
Ratings
Units
V
DSS
Drain to Source Voltage
500
V
V
GS
Gate to Source Voltage
30
V
I
D
Drain Current
27
A
Continuous (T
C
= 25
o
C, V
GS
= 10V)
Continuous (T
C
= 100
o
C, V
GS
= 10V)
19
A
Pulsed (Note 1)
108
A
P
D
Power dissipation
Derate above 25
o
C
450
3
W
W/
o
C
T
J
, T
STG
Operating and Storage Temperature
-55 to 175
o
C
Soldering Temperature for 10 seconds
300 (1.6mm from case)
o
C
Mounting Torque, 8-32 or M3 Screw
10ibf*in (1.1N*m)
R
JC
Thermal Resistance Junction to Case
0.33
o
C/W
R
CS
Thermal Resistance Case to Sink, Flat, Greased Surface
0.24 TYP
o
C/W
R
JA
Thermal Resistance Junction to Ambient
40
o
C/W
D
G
S
DRAIN
(FLANGE)
DRAIN
SOURCE
GATE
JEDEC TO-247
Package
Symbol
2002 Fairchild Semiconductor Corporation
FDH27N50 Rev. A2
FDH27N50
Package Marking and Ordering Information
Electrical Characteristics
Tc = 25C (unless otherwise noted)
Statics
Dynamics
Avalanche Characteristics
Drain-Source Diode Characteristics
Notes:
1: Repetitive rating; pulse width limited by maximum junction temperature
2: Starting T
J
= 25C, L = 7mH, I
AS
= 27A
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDH27N50
FDH27N50
TO-247
Tube
-
30
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
B
VDSS
Drain to Source Breakdown Voltage
I
D
= 250
A, V
GS
= 0V
500
-
-
V
B
VDSS
/
T
J
Breakdown Voltage Temp. Coefficient
Reference to 25
o
C
I
D
= 1mA
-
0.64
-
V/C
r
DS(ON)
Drain to Source On-Resistance
V
GS
= 10V, I
D
= 13.5A
-
0.17
0.19
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
2.0
3.3
4.0
V
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 500V
T
C
=25
o
C
-
-
25
A
V
GS
= 0V
T
C
= 150
o
C
-
-
250
I
GSS
Gate to Source Leakage Current
V
GS
= 30V
-
-
100
nA
g
fs
Forward Transconductance
V
DS
= 50V, I
D
= 13.5A
11
-
-
S
Q
g(TOT)
Total Gate Charge at 10V
V
GS
= 10V
V
DS
= 400V
I
D
= 27A
-
56
67
nC
Q
gs
Gate to Source Gate Charge
-
17
20
nC
Q
gd
Gate to Drain "Miller" Charge
-
18
22
nC
t
d(ON)
Turn-On Delay Time
V
DD
= 250V
I
D
= 27A
R
G
= 4.3
R
D
= 9.3
-
14
-
ns
t
r
Rise Time
-
54
-
ns
t
d(OFF)
Turn-Off Delay Time
-
47
-
ns
t
f
Fall Time
-
54
-
ns
C
ISS
Input Capacitance
V
DS
= 25V, V
GS
= 0V
f = 1MHz
-
3550
-
pF
C
OSS
Output Capacitance
-
409
-
pF
C
RSS
Reverse Transfer Capacitance
-
22
-
pF
E
AS
Single Pulse Avalanche Energy (Note 2)
2552
-
-
mJ
I
AR
Avalanche Current
-
-
27
A
I
S
Continuous Source Current
(Body Diode)
MOSFET symbol
showing the
integral reverse
p-n junction diode.
-
-
27
A
I
SM
Pulsed Source Current
(Note 1)
(Body Diode)
-
-
108
A
V
SD
Source to Drain Diode Voltage
I
SD
= 27A
-
0.89
1.2
V
t
rr
Reverse Recovery Time
I
SD
= 27A, dI
SD
/dt = 100A/
s
-
563
714
ns
Q
RR
Reverse Recovered Charge
I
SD
= 27A, dI
SD
/dt = 100A/
s
-
9.2
14
C
D
G
S
2002 Fairchild Semiconductor Corporation
FDH27N50 Rev. A2
FDH27N50
Typical Characteristics
Figure 1. Output Characteristics
Figure 2. Output Characteristics
Figure 3. Transfer Characteristics
Figure 4. Normalized Drain To Source On
Resistance vs Junction Temperatrue
Figure 5. Capacitance vs Drain To Source Voltage
Figure 6. Gate Charge Waveforms For Constant
Gate Current
1
10
100
200
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRA
IN T
O
SOURCE CURRENT
(
A
)
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
GS
DESCENDING
10V
7V
6V
5.5V
5V
4.5V
T
J
= 25
o
C
1
10
100
200
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN T
O
SOURCE CURRENT
(
A
)
T
J
= 175
o
C
V
GS
DESCENDING
10V
6V
5.5V
5V
4.5V
4V
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
0
10
20
30
40
50
60
70
80
90
100
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
I
D
,
DRAIN CURRENT
(
A
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
T
J
= 175
o
C
T
J
= 25
o
C
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
DD
= 80V
0
0.5
1.0
1.5
2.0
2.5
3.0
-50
-25
0
25
50
75
100
125
150
175
3.5
NORM
AL
IZ
ED DRAIN t
o
S
O
UR
CE ON RESIS
T
ANCE
T
J
, JUNCTION TEMPERATURE (
o
C)
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10V, I
D
= 13.5A
10
100
1000
10000
1
10
100
C, CAP
A
C
IT
A
NCE

(
p
F
)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 0V, f = 1MHz
C
ISS
C
OSS
C
RSS
0
6
8
12
0
30
40
50
60
V
GS
, GA
T
E
T
O

S
O
URCE V
O
L
T
A
G
E (
V
)
Q
g
, GATE CHARGE (nC)
I
D
= 27A
10
70
250V
400V
100V
20
10
4
2
2002 Fairchild Semiconductor Corporation
FDH27N50 Rev. A2
FDH27N50
Figure 7. Body Diode Forward Voltage vs Body
Diode Current
Figure 8. Maximum Safe Operating Area
Figure 9. Maximum Drain Current vs Case Temperature
Figure 10. Normalized Maximum Transient Thermal Impedance
Typical Characteristics
(Continued)
0
10
20
30
40
50
60
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
I
SD
, SO
URCE T
O

DRAIN CURRENT
(
A
)
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
T
J
= 25
o
C
T
J
= 175
o
C
0.1
1
10
100
200
1
10
100
1000
I
D
, DRAIN
CURRENT
(
A
)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
OPERATION IN THIS AREA
LIMITED BY R
DS(ON)
T
C
= 25
o
C
1ms
DC
10ms
100s
0
5
10
15
20
25
30
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (C)
I
D
, D
RAIN CURRENT
(
A
)
t
1
, RECTANGULAR PULSE DURATION (s)
Z
JC
,
N
ORMALIZED THERMAL IMPED
ANCE
10
0
10
-5
10
-3
10
-2
10
-1
10
0
10
1
10
-4
t
1
t
2
P
D
DUTY FACTOR, D = t
1
/ t
2
PEAK T
J
= (P
D
X Z
JC
X R
JC
) + T
C
SINGLE PULSE
0.20
0.50
0.10
0.05
0.02
0.01
10
-1
10
-2
2002 Fairchild Semiconductor Corporation
FDH27N50 Rev. A2
FDH27N50
Test Circuits and Waveforms
Figure 11. Unclamped Energy Test Circuit
Figure 12. Unclamped Energy Waveforms
Figure 13. Gate Charge Test Circuit
Figure 14. Gate Charge Waveforms
Figure 15. Switching Time Test Circuit
Figure 16. Switching Time Waveform
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
g(REF)
Q
g(TH)
V
GS
= 1V
Q
g(TOT)
V
GS
= 10V
V
DS
V
GS
I
g(REF)
0
0
Q
gs
Q
gd
V
GS
R
L
R
GS
DUT
+
-
V
DD
V
DS
V
GS
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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