March 1998
FDN358P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
Absolute Maximum Ratings
T
A
= 25
o
C unless other wise noted
Symbol
Parameter
FDN358P
Units
V
DSS
Drain-Source Voltage
-30
V
V
GSS
Gate-Source Voltage
20
V
I
D
Drain/Output Current - Continuous
-1.5
A
- Pulsed
-5
P
D
Maximum Power Dissipation
(Note 1a)
0.5
W
(Note 1b)
0.46
T
J
,T
STG
Operating and Storage Temperature Range
-55 to 150
C
THERMAL CHARACTERISTICS
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
250
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
75
C/W
FDN358P Rev.D
-1.5 A, -30 V, R
DS(ON)
= 0.125
@ V
GS
= -10 V
R
DS(ON)
= 0.20
@ V
GS
= - 4.5 V.
High power version of industry SOT-23 package: identical
pin out to SOT-23; 30% higher power handling capability.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
SuperSOT
TM
-3 P-Channel logic level enhancement mode
power field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. These devices are particularly suited for
low voltage applications in notebook computers, portable
phones, PCMCIA cards, and other battery powered circuits
where fast switching, and low in-line power loss are needed
in a very small outline surface mount package.
G
D
S
SuperSOT -3
TM
358
SuperSOT
TM
-8
SOIC-16
SO-8
SOT-223
SuperSOT
TM
-3
SuperSOT
TM
-6
D
S
G
1998 Fairchild Semiconductor Corporation
Electrical Characteristics
(T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= -250 A
-30
V
BV
DSS
/
T
J
Breakdown Voltage Temp. Coefficient
I
D
= -250 A, Referenced to 25
o
C
-28
mV/
o
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= -24 V, V
GS
= 0 V
-1
A
T
J
= 55C
-10
A
I
GSSF
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
100
nA
I
GSSR
Gate - Body Leakage, Reverse
V
GS
= -20 V, V
DS
= 0 V
-100
nA
ON CHARACTERISTICS
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250 A
-1
-1.5
-2
V
V
GS(th)
/
T
J
Gate Threshold Voltage Temp. Coefficient
I
D
= -250 A, Referenced to 25
o
C
3
mV/
o
C
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= -10 V, I
D
= -1.5 A
0.11
0.125
T
J
=125C
0.15
0.21
V
GS
= -4.5 V, I
D
= -1.2 A
0.175
0.2
I
D(ON)
On-State Drain Current
V
GS
= -4.5 V, V
DS
= -5 V
-5
A
g
FS
Forward Transconductance
V
DS
= -10 V, I
D
= -1.5 A
7
S
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance
V
DS
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
270
pF
C
oss
Output Capacitance
150
pF
C
rss
Reverse Transfer Capacitance
45
pF
SWITCHING CHARACTERISTICS
(Note 2)
t
D(on)
Turn - On Delay Time
V
DD
= -15 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 6
8
16
ns
t
r
Turn - On Rise Time
7
14
ns
t
D(off)
Turn - Off Delay Time
17
27
ns
t
f
Turn - Off Fall Time
10
1.8
ns
Q
g
Total Gate Charge
V
DS
= -5 V, I
D
= -1.5 A,
V
GS
= -10 V
6.5
9.1
nC
Q
gs
Gate-Source Charge
1
nC
Q
gd
Gate-Drain Charge
1.1
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
-0.42
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -0.42 A
(Note 2)
-0.74
-1.2
V
Note:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JC
is guaranteed by
design while R
CA
is determined by the user's board design.
Typical R
JA
using the board layouts shown below on FR-4 PCB in a still air environment :
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
FDN358P Rev.D
a. 250
o
C/W when mounted on a
0.02 in
2
pad of 2oz Cu.
b. 270
o
C/W when mounted on
a 0.001 in
2
pad of 2oz Cu.
FDN358P Rev.D
0
1
2
3
4
5
0
2
4
6
8
10
-V , DRAIN-SOURCE VOLTAGE (V)
-I , DRAIN-SOURCE CURRENT (A)
V = -10V
GS
-5.0
DS
D
-4.0
-3.0
-3.5
-6.0
-4.5
0
2
4
6
8
10
1
1.5
2
2.5
-I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = -4.0V
GS
D
R , NORMALIZED
DS(ON)
-6.0
-5.0
-4.5
-10
-7.0
-8.0
Typical Electrical Characteristics
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate
-50
-25
0
25
50
75
100
125
150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (C)
DRAIN-SOURCE ON-RESISTANCE
J
R , NORMALIZED
DS(ON)
V = -10V
GS
I = -1.5A
D
Figure 3. On-Resistance Variation
with Temperature.
1
2
3
4
5
6
0
2
4
6
8
10
-V , GATE TO SOURCE VOLTAGE (V)
-I , DRAIN CURRENT (A)
V = -5V
DS
GS
D
T = -55C
A
125C
25C
Figure 5. Transfer Characteristics.
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0.0001
0.001
0.01
0.1
1
10
-V , BODY DIODE FORWARD VOLTAGE (V)
-I , REVERSE DRAIN CURRENT (A)
25C
-55C
V = 0V
GS
SD
S
T = 125C
J
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
2
4
6
8
10
0
0.1
0.2
0.3
0.4
0.5
-V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(on)
T = 125C
A
T = 25C
A
I = 0.75A
D
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDN358P Rev.D
0
2
4
6
8
0
2
4
6
8
10
Q , GATE CHARGE (nC)
-V , GATE-SOURCE VOLTAGE (V)
g
GS
V = -5V
DS
-10V
I = -1.5A
D
-15V
0.1
0.2
0.5
1
2
5
10
30
50
0.01
0.05
0.1
0.5
1
2
5
10
- V , DRAIN-SOURCE VOLTAGE (V)
-I , DRAIN CURRENT (A)
RDS(ON) LIMIT
D
A
DC
DS
1s
100ms
10ms
1ms
10s
V = -10V
SINGLE PULSE
R = 250C/W
T = 25C
JA
GS
A
0.0001
0.001
0.01
0.1
1
10
100 300
0
10
20
30
40
50
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =250 C/W
T = 25C
JA
A
Figure 10. Single Pulse Maximum Power
Dissipation.
0.0001
0.001
0.01
0.1
1
10
100
300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
R (t) = r(t) * R
R = 250 C/W
Duty Cycle, D = t /t
1
2
JA
JA
JA
T - T = P * R (t)
JA
A
J
P(pk)
t
1
t
2
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
Figure 11. Transient Thermal Response Curve.
0.1
0.2
0.5
1
2
5
10
30
20
50
100
200
400
700
-V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 MHz
V = 0 V
GS
C
oss
C
rss
Figure 8. Capacitance Characteristics.
Figure 7. Gate Charge Characteristics.
Figure 9. Maximum Safe Operating Area.
Typical Electrical Characteristics
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