2006 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
January 2006
UniFET
TM
FDP20N50
500V N-Channel MOSFET
Features
20A, 500V, R
DS(on)
= 0.24
@V
GS
= 10 V
Low gate charge ( typical 45.6 nC)
Low C
rss
( typical 27 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild's proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
cient switched mode power supplies and active power factor
correction.
TO-220
FDP Series
G
S
D
D
G
S
Absolute Maximum Ratings
Symbol
Parameter
FDP20N50
Unit
V
DSS
Drain-Source Voltage
500
V
I
D
Drain Current
- Continuous (T
C
= 25
C)
- Continuous (T
C
= 100
C)
20
12.9
A
A
I
DM
Drain Current
- Pulsed
(Note 1)
80
A
V
GSS
Gate-Source voltage
30
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
1110
mJ
I
AR
Avalanche Current
(Note 1)
20
A
E
AR
Repetitive Avalanche Energy
(Note 1)
25.0
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
4.5
V/ns
P
D
Power Dissipation
(T
C
= 25
C)
- Derate above 25
C
250
2.0
W
W/
C
T
J,
T
STG
Operating and Storage Temperature Range
-55 to +150
C
T
L
Maximum Lead Temperature for Soldering Purpose,
1/8" from Case for 5 Seconds
300
C
Thermal Characteristics
Symbol
Parameter
Min.
Max.
Unit
R
JC
Thermal Resistance, Junction-to-Case
--
0.5
C/W
R
CS
Thermal Resistance, Case-to-Sink
0.5
--
C/W
R
JA
Thermal Resistance, Junction-to-Ambient
--
62.5
C/W
* Drain current limited by maximum junction termperature.
2
www.fairchildsemi.com
FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDP20N50
FDP20N50
TO-220
--
--
50
Electrical Characteristics
T
C
= 25C unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0V, I
D
= 250
A, T
J
= 25
C
500
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
--
0.50
--
V/
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 500V, V
GS
= 0V
V
DS
= 400V, T
C
= 125
C
--
--
--
--
1
10
A
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 30V, V
DS
= 0V
--
--
100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -30V, V
DS
= 0V
--
--
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
3.0
--
5.0
V
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10V, I
D
= 10A
--
0.20
0.24
g
FS
Forward Transconductance
V
DS
= 40V, I
D
= 10A
(Note 4)
--
24.6
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25V, V
GS
= 0V,
f = 1.0MHz
--
2400
3120
pF
C
oss
Output Capacitance
--
355
465
pF
C
rss
Reverse Transfer Capacitance
--
27
--
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 250V, I
D
= 20A
R
G
= 25
(Note 4, 5)
--
95
200
ns
t
r
Turn-On Rise Time
--
375
760
ns
t
d(off)
Turn-Off Delay Time
--
100
210
ns
t
f
Turn-Off Fall Time
--
105
220
ns
Q
g
Total Gate Charge
V
DS
= 400V, I
D
= 20A
V
GS
= 10V
(Note 4, 5)
--
45.6
59.5
nC
Q
gs
Gate-Source Charge
--
14.8
--
nC
Q
gd
Gate-Drain Charge
--
21.6
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
20
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
80
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0V, I
S
= 20A
--
--
1.4
V
t
rr
Reverse Recovery Time
V
GS
= 0V, I
S
= 20A
dI
F
/dt =100A/
s
(Note 4)
--
507
--
ns
Q
rr
Reverse Recovery Charge
--
7.20
--
C
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 5.0mH, I
AS
= 20A, V
DD
= 50V, R
G
= 25
, Starting T
J
= 25
C
3. I
SD
20A, di/dt 200A/s, V
DD
BV
DSS
, Starting T
J
= 25
C
4. Pulse Test: Pulse width
300s, Duty Cycle 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
3
www.fairchildsemi.com
FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
2
4
6
8
10
12
10
0
10
1
150
o
C
25
o
C
-55
o
C
Notes :
1. V
DS
= 40V
2. 250 s Pulse Test
I
D
, Dra
i
n
C
u
r
r
e
n
t [A]
V
GS
, Gate-Source Voltage [V]
10
-1
10
0
10
1
10
0
10
1
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Notes :
1. 250 s Pulse Test
2. T
C
= 25
I
D
,
Dra
i
n Cu
rrent
[
A
]
V
DS
, Drain-Source Voltage [V]
Figure 3. On-Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage
Variation vs. Source Current
and Temperatue
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10
0
10
1
150
Notes :
1. V
GS
= 0V
2. 250 s Pulse Test
25
I
DR
,
Re
ve
r
s
e
D
r
ai
n C
u
r
r
e
nt
[
A
]
V
SD
, Source-Drain voltage [V]
0
15
30
45
60
75
90
0.0
0.2
0.4
0.6
0.8
V
GS
= 20V
V
GS
= 10V
Note : T
J
= 25
R
DS
(ON)
[
],
Dr
ai
n-
Source O
n-Resi
s
t
ance
I
D
, Drain Current [A]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
0
10
20
30
40
50
0
2
4
6
8
10
12
V
DS
= 250V
V
DS
= 100V
V
DS
= 400V
Note : I
D
= 20A
V
GS
,
G
at
e-
S
ou
r
c
e Vol
t
ag
e [
V
]
Q
G
, Total Gate Charge [nC]
10
-1
10
0
10
1
0
1000
2000
3000
4000
5000
6000
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
* Note :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Ca
pa
ci
tan
c
es
[pF
]
V
DS
, Drain-Source Voltage [V]
4
www.fairchildsemi.com
FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
Figure 8. On-Resistance Variation
vs. Temperature
vs. Temperature
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
Notes :
1. V
GS
= 0 V
2. I
D
= 250 A
BV
DSS
,
(
N
or
ma
liz
ed)
Dr
ain-Sour
ce Bre
ak
dow
n
Volt
ag
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
* Notes :
1. V
GS
= 10 V
2. I
D
= 5.5 A
R
DS
(O
N
)
,
(No
r
m
ali
z
ed)
D
r
ain-S
ource
O
n
-R
esist
a
nce
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. V
GS
= 10 V
2. I
D
= 10 A
R
DS
(O
N
)
,
(
N
orm
aliz
ed)
Dr
ain-Sour
ce On
-Res
is
t
anc
e
T
J
, Junction Temperature [
o
C]
Figure 9. Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
25
50
75
100
125
150
0
5
10
15
20
25
I
D
, Dr
a
i
n Cu
r
r
ent
[
A
]
T
C
, Case Temperature [ ]
10
0
10
1
10
2
10
3
10
-1
10
0
10
1
10
2
100 ms
1 ms
10
s
DC
10 ms
100
s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
,
Drai
n Curre
nt
[
A
]
V
DS
, Drain-Source Voltage [V]
Figure 11. Transient Thermal Response Curve
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
-2
1 0
-1
1 0
0
N o te s :
1 . Z
J C
( t) = 0 .5
/W M a x .
2 . D u ty F a c to r , D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
q J C
( t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC
(t)
, T
he
r
mal
Res
pon
se
t
1
, S q u a r e W a v e P u ls e D u r a tio n [s e c ]
t
1
P
DM
t
2
5
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FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
6
www.fairchildsemi.com
FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
7
www.fairchildsemi.com
FDP20N50 Rev. A
F
D
P20N50 500V N-Channel MOSFET
Mechanical Dimensions
4.50
0.20
9.90
0.20
1.52
0.10
0.80
0.10
2.40
0.20
10.00
0.20
1.27
0.10
3.60
0.10
(8.70)
2.80
0.10
15.90
0.20
10.08
0.30
18.95MAX.
(1.70)
(3.70)
(3.00)
(1.46)
(1.00)
(45
)
9.20
0.20
13.08
0.20
1.30
0.10
1.30
+0.10
0.05
0.50
+0.10
0.05
2.54TYP
[2.54
0.20
]
2.54TYP
[2.54
0.20
]
TO-220
Dimensions in Millimeters
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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