2005 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
January 2006
UniFET
TM
FDP75N08
75V N-Channel MOSFET
Features
75A, 75V, R
DS(on)
= 0.011
@V
GS
= 10 V
Low gate charge ( typical 64 nC)
Low Crss ( typical 85 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies, active power factor
correction, electronic lamp ballast based on half bridge
topology.
Absolute Maximum Ratings
Thermal Characteristics
TO-220
FDP Series
G
S
D
D
G
S
Symbol
Parameter
FDP75N08
Units
V
DSS
Drain-Source Voltage
75
V
I
D
Drain Current
- Continuous (T
C
= 25C)
75
A
- Continuous (T
C
= 100C)
47.7
A
I
DM
Drain Current
- Pulsed
(Note 1)
300
A
V
GSS
Gate-Source Voltage
20
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
1164
mJ
I
AR
Avalanche Current
(Note 1)
75
A
E
AR
Repetitive Avalanche Energy
(Note 1)
13.1
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
4.5
V/ns
P
D
Power Dissipation (T
C
= 25C)
131
W
- Derate above 25C
1
W/C
T
J
, T
STG
Operating and Storage Temperature Range
-55 to +150
C
T
L
Maximum lead temperature for soldering purposes,
1/8
"
from case for 5 seconds
300
C
Symbol
Parameter
FDP75N08
Units
R
JC
Thermal Resistance, Junction-to-Case
0.95
C
/
W
R
CS
Thermal Resistance, Case-to-Sink
0.5
C
/
W
R
JA
Thermal Resistance, Junction-to-Ambient
62.5
C
/
W
2
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
Package Marking and Ordering Information
Electrical Characteristics
T
C
= 25C unless otherwise noted
NOTES:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 138
H, I
AS
= 75A, V
DD
= 50V, R
G
= 25
,
Starting T
J
= 25C
3. I
SD
75A, di/dt
200A/
s, V
DD
BV
DSS,
Starting T
J
= 25C
4. Pulse Test : Pulse width
300
s, Duty cycle
2%
5. Essentially independent of operating temperature
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FDP75N08
FDP75N08
TO-220
--
--
50
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
75
--
--
V
BV
DSS
/
T
J
Breakdown Voltage Temperature Coefficient
I
D
= 250
A, Referenced to 25C
--
0.6
--
V/C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 75 V, V
GS
= 0 V
--
--
1
A
V
DS
= 60 V, T
C
= 125C
--
--
10
A
I
GSSF
Gate-Body Leakage Current, Forward
V
GS
= 20 V, V
DS
= 0 V
--
--
100
nA
I
GSSR
Gate-Body Leakage Current, Reverse
V
GS
= -20 V, V
DS
= 0 V
--
--
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
2.0
--
4.0
V
R
DS(on)
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 37.5 A
--
9.5
11
m
g
FS
Forward Transconductance
V
DS
= 40 V, I
D
=37.5 A
(Note 4)
--
15
--
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
2940
3820
pF
C
oss
Output Capacitance
--
680
890
pF
C
rss
Reverse Transfer Capacitance
--
85
125
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
V
DD
= 37.5 V, I
D
= 75A,
R
G
= 25
(Note 4, 5)
--
7.2
25
ns
t
r
Turn-On Rise Time
--
68
146
ns
t
d(off)
Turn-Off Delay Time
--
77
164
ns
t
f
Turn-Off Fall Time
--
93
196
ns
Q
g
Total Gate Charge
V
DS
= 60 V, I
D
= 75A,
V
GS
= 10 V
(Note 4, 5)
--
64
84
nC
Q
gs
Gate-Source Charge
--
16
--
nC
Q
gd
Gate-Drain Charge
--
24
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
--
--
75
A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current
--
--
300
A
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 75 A
--
--
1.4
V
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
S
= 75 A,
dI
F
/ dt = 100 A/
s
(Note 4)
--
40
--
ns
Q
rr
Reverse Recovery Charge
--
75
--
nC
3
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage
Variation vs. Source Current
and Temperatue
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
10
0
10
1
10
1
10
2
V
GS
Top: 15.0V
9.0V
7.5V
7.0V
6.5v
6.0V
5.5V
5.0V
Bottom : 4.5V
* Note :
1. 250
s Pulse Test
2. T
C
=25
0
C
V
DS
, Drain-Source Voltage [V]
I
D
,
Dr
ain Curr
ent [A]
2
4
6
8
10
1
10
100
* Note :
1. V
DS
=40V
2. 250
s Pulse Test
-55
0
C
25
0
C
150
0
C
I
D
, Drai
n Curr
ent [A]
V
GS
, Gate-Source Voltage [V]
0
25
50
75
100
125
150
175
200
0.007
0.008
0.009
0.010
0.011
0.012
V
GS
= 20V
V
GS
= 10V
* Note : T
J
= 25
o
C
R
DS
(
O
N)
[
],
D
r
a
i
n-S
o
u
r
c
e
On
-R
es
i
s
ta
nc
e
I
D
, Drain Current [A]
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10
0
10
1
10
2
25
0
C
150
0
C
* Note :
1. V
GS
=0V
2. 250
s Pulse Test
I
DR
, R
e
v
e
rse
Drain C
u
r
r
en
t
[
A
]
V
DS
, Source-Drain Violtage [V]
10
-1
10
0
10
1
0
1000
2000
3000
4000
5000
6000
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
* Note :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
C
a
pacit
a
n
ces [
p
F]
V
DS
, Drain-Source Voltage [V]
0
10
20
30
40
50
60
70
80
0
2
4
6
8
10
12
V
DS
= 37.5V
V
DS
= 60V
* Note : I
D
= 75A
V
GS
,
Gat
e
-
S
our
c
e
Volt
ag
e [
V
]
Q
G
, Total Gate Charge [nC]
4
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
Figure 8. On-Resistance Variation
vs. Temperature
vs. Temperature
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Transient Thermal Response Curve
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
* Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
BV
DS
S
,
(
N
or
m
a
liz
ed)
Dr
a
i
n-
Sou
r
ce B
r
eak
dow
n V
o
lt
ag
e
T
J
, Junction Temperature [
o
C]
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
* Notes :
1. V
GS
= 10 V
2. I
D
= 37.5 A
R
DS
(
O
N)
,
(
N
or
m
a
liz
ed)
Dr
ain-
So
ur
ce On-
R
esist
a
nce
T
J
, Junction Temperature [
o
C]
10
0
10
1
10
2
10
-2
10
-1
10
0
10
1
10
2
10
3
DC
100ms
10ms
1ms
100
s
10
s
Operation in This Area
is Limited by R
DS(on)
* Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
,
Drain
C
u
r
r
ent
[
A
]
V
DS
, Drain-SourceVoltage[V]
25
50
75
100
125
150
0
10
20
30
40
50
60
70
80
I
D
,
Dr
ain Cu
r
r
ent
[
A
]
T
C
, Case Temperature [
o
C]
1 0
- 5
1 0
- 4
1 0
-3
1 0
- 2
1 0
-1
1 0
0
1 0
1
1 0
- 2
1 0
- 1
1 0
0
? N o te s :
1 . Z
? J C
( t ) = 1 . 1
0
C / W M a x .
2 . D u t y F a c t o r , D = t
1
/ t
2
3 . T
J M
- T
C
= P
D M
* Z
? J C
( t )
s in g le p u ls e
D = 0 . 5
0 . 0 2
0 . 2
0 . 0 5
0 . 1
0 . 0 1
Z
?J
C
(
t
)
,
T
h
er
m
a
l
Res
pon
se
t
1
, S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
t
1
P
DM
t
2
5
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
6
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
7
www.fairchildsemi.com
FDP75N08 Rev. A
FDP75N08 75V N-Chan
nel MOSF
ET
Mechanical Dimensions
4.50
0.20
9.90
0.20
1.52
0.10
0.80
0.10
2.40
0.20
10.00
0.20
1.27
0.10
3.60
0.10
(8.70)
2.80
0.10
15.90
0.20
10.08
0.30
18.95MAX.
(1.70)
(3.70)
(3.00)
(1.46)
(1.00)
(45
)
9.20
0.20
13.08
0.20
1.30
0.10
1.30
+0.10
0.05
0.50
+0.10
0.05
2.54TYP
[2.54
0.20
]
2.54TYP
[2.54
0.20
]
TO-220
Dimensions in Millimeters
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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