2005 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
June 2005
FDS6930B Rev. A
FDS6930B Dual N-Channel Logic Le
vel P
o
werT
renc
h
MOSFET
FDS6930B
Dual N-Channel Logic Level PowerTrench
MOSFET
Features
5.5 A, 30 V.
R
DS(ON)
= 38 m
@ V
GS
= 10 V
R
DS(ON)
= 50 m
@ V
GS
= 4.5 V
Fast switching speed
Low gate charge
High performance trench technology for extremely
low R
DS(ON)
High power and current handling capability
General Description
These N-Channel Logic Level MOSFETs are produced using
Fairchild Semiconductor's advanced PowerTrench process that
has been especially tailored to minimize the on-state resistance
and yet maintain superior switching performance.
These devices are well suited for low voltage and battery pow-
ered applications where low in-line power loss and fast switch-
ing are required.
Absolute Maximum Ratings
T
A
= 25C unless otherwise noted
Package Marking and Ordering Information
Symbol
Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
30
V
V
GSS
Gate-Source Voltage
20
V
I
D
Drain Current
Continuous
(Note 1a)
5.5
A
Pulsed
20
P
D
Power Dissipation for Dual Operation
(Note 1)
2
W
Power Dissipation for Single Operation
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
0.9
T
J
, T
STG
Operating and Storage Junction Temperature Range
55 to 150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
40
C/W
Device Marking
Device
Reel Size
Tape width
Quantity
FDS6930B
FDS6930B
13"
12mm 2500
units
D1
D1
D2
D2
S1
G1
S2
G2
Pin 1
SO-8
4
5
3
6
2
7
1
8
2
www.fairchildsemi.com
FDS6930B Rev. A
FDS6930B Dual N-Channel Logic Le
vel P
o
werT
renc
h
MOSFET
Electrical Characteristics
T
A
= 25C unless otherwise noted
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
JC
is guaranteed by design while R
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
3. Trr parameter will not be subjected to 100% production testing.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
DrainSource Breakdown Voltage
V
GS
= 0 V, I
D
= 250
A
30
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25
C
26
mV/
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
V
DS
= 24 V, V
GS
= 0 V, T
J
= 55
C
1
10
A
I
GSS
GateSource Leakage
V
GS
=
20 V, V
DS
= 0 V
100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
1
1.9
3
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25
C
4.6
mV/
C
R
DS(on)
Static DrainSource
OnResistance
V
GS
= 10 V, I
D
= 5.5 A
V
GS
= 4.5 V, I
D
= 4.8 A
V
GS
= 10 V, I
D
= 5.5 A, T
J
= 125
C
31
40
45
38
50
62
m
I
D(on)
OnState Drain Current
V
GS
= 10 V, V
DS
= 5 V
20
A
g
FS
Forward Transconductance
V
DS
= 5 V, I
D
= 5.5 A
19
S
Dynamic Characteristics
C
iss
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
310
412
pF
C
oss
Output Capacitance
90
120
pF
C
rss
Reverse Transfer Capacitance
40
60
pF
R
G
Gate Resistance
V
GS
= 15 mV, f = 1.0 MHz
1.9
Switching Characteristics
(Note 2)
t
d(on)
TurnOn Delay Time
V
DD
= 15 V, I
D
= 1 A,
V
GS
= 10 V, R
GEN
= 6
6
12
ns
t
r
TurnOn Rise Time
6
12
ns
t
d(off)
TurnOff Delay Time
16
28
ns
t
f
TurnOff Fall Time
2
4
ns
Q
g
Total Gate Charge
V
DS
= 5 V, I
D
= 5.5 A,
V
GS
= 5 V
2.7
3.8
nC
Q
gs
GateSource Charge
1.0
nC
Q
gd
GateDrain Charge
0.7
nC
DrainSource Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous DrainSource Diode Forward Current
1.3
A
V
SD
DrainSource Diode Forward Voltage
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
0.8
1.2
V
t
rr
Diode Reverse Recovery Time
(note3)
I
F
= 5.5 A, d
iF
/d
t
= 100 A/s
16
32
nS
Q
rr
Diode Reverse Recovery Charge
6
nC
a) 78C/W when mounted
on a 0.5 in
2
pad of 2 oz
copper
b) 125C/W when
mounted on a 0.02 in
2
pad of 2 oz copper
c) 135C/W when
mounted on a
minimum pad.
3
www.fairchildsemi.com
FDS6930B Rev. A
FDS6930B Dual N-Channel Logic Le
vel P
o
werT
renc
h
MOSFET
Typical Characteristics
0
4
8
12
16
20
0
0.5
1
1.5
2
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
V
GS
= 10V
4.5V
3.5V
4.0V
3.0V
6.0V
0.8
1
1.2
1.4
1.6
1.8
2
0
4
8
12
16
20
I
D
, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 3.5V
4.5V
5.0V
6.0V
10.0V
4.0V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 5.5A
V
GS
= 10.0V
0.02
0.04
0.06
0.08
0.1
0.12
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= 2.75A
T
A
= 125
C
T
A
= 25
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
4
8
12
16
20
1
2
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
T
A
= 125
C
25
C
-55
C
V
DS
= 5V
0.0001
0.001
0.01
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
I
S
, REVERSE DRAIN CURRENT (A)
V
GS
= 0V
T
A
= 125
C
25
C
-55
C
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
4
www.fairchildsemi.com
FDS6930B Rev. A
FDS6930B Dual N-Channel Logic Le
vel P
o
werT
renc
h
MOSFET
Typical Characteristics
0
2
4
6
8
10
0
1
2
3
4
5
6
Q
g
, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 5.5A
V
DS
= 5V
15V
10V
0
100
200
300
400
500
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
iss
C
oss
C
rss
f = 1 MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.01
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
DC
10s
1s
100ms
100
s
R
DS(ON)
LIMIT
V
GS
= 10.0V
SINGLE PULSE
R
JA
= 135
C/W
T
A
= 25
C
10ms
1ms
0
10
20
30
40
50
0.001
0.01
0.1
1
10
100
t
1
, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
JA
= 135
C/W
T
A
= 25
C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
R
JA
(t) = r(t) * R
JA
R
JA
= 135
C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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