FDS6982
FDS6982, Rev. C
FDS6982
Dual N-Channel, Notebook Power Supply MOSFET
June 1999
Features
Q2: 8.6A, 30V. R
DS(on)
= 0.015
@ V
GS
= 10V
R
DS(on)
= 0.020
@ V
GS
= 4.5V
Q1: 6.3A, 30V. R
DS(on)
= 0.028
@ V
GS
= 10V
R
DS(on)
= 0.035
@ V
GS
= 4.5V
Fast switching speed.
Low gate charge (Q1 typical = 8.5nC).
High performance trench technology for extremely
low R
DS(ON)
.
1999 Fairchild Semiconductor Corporation
Absolute Maximum Ratings
T
A
= 25C unless otherwise noted
Symbol
Parameter
Q2
Q1
Units
V
DSS
Drain-Source Voltage
30
30
V
V
GSS
Gate-Source Voltage
20
20
V
I
D
Drain Current
- Continuous
(Note 1a)
8.6
6.3
A
- Pulsed
30
20
P
D
Power Dissipation for Dual Operation
2
W
Power Dissipation for Single Operation
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
0.9
T
J
, T
stg
Operating and Storage Junction Temperature Range
-55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
40
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
FDS6982
FDS6982
13"
12mm
2500 units
D1
SO-8
D2
D2
D1
S1
S2
G1
G2
General Description
This part is designed to replace two single SO-8 MOSFETs
in synchronous DC:DC power supplies that provide the
various peripheral voltage rails required in notebook
computers and other battery powered electronic devices.
FDS6982 contains two unique 30V, N-channel, logic level,
PowerTrench
TM
MOSFETs designed to maximize power
conversion efficiency.
The high-side switch (Q1) is designed with specific
emphasis on reducing switching losses while the low-side
switch (Q2) is optimized for low conduction (less than 20m
at V
GS
= 4.5V).
Applications
Battery powered synchronous DC:DC converters.
Embedded DC:DC conversion.
1
5
7
8
2
3
4
6
Q1
Q2
FDS6982
FDS6982, Rev. C
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min
Typ Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown
Voltage
V
GS
= 0 V, I
D
= 250
A
Q2
Q1
30
30
V
BV
DSS
T
J
Breakdown Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25
C
Q2
Q1
27
26
mV/
C
I
DSS
Zero Gate Voltage Drain
Current
V
DS
= 24 V, V
GS
= 0 V
All
1
A
I
GSSF
Gate-Body Leakage, Forward V
GS
= 20 V, V
DS
= 0 V
All
100
nA
I
GSSR
Gate-Body Leakage, Reverse V
GS
= -20 V, V
DS
= 0 V
All
-100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
Q2
Q1
1
1
2.2
1.6
3
3
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25
C
Q2
Q1
-5
-4
mV/
C
R
DS(on)
Static Drain-Source
On-Resistance
V
GS
= 10 V, I
D
= 8.6 A
V
GS
= 10 V, I
D
= 8.6 A, T
J
= 125
C
V
GS
= 4.5 V, I
D
= 7.5 A
V
GS
= 10 V, I
D
= 6.3 A
V
GS
= 10 V, I
D
= 6.3 A, T
J
= 125
C
V
GS
= 4.5 V, I
D
= 5.6 A
Q2
Q1
0.012
0.018
0.016
0.021
0.038
0.028
0.015
0.024
0.020
0.028
0.047
0.035
I
D(on)
On-State Drain Current
V
GS
= 10 V, V
DS
= 5 V
Q2
Q1
30
20
A
g
FS
Forward Transconductance
V
DS
= 5 V, I
D
= 8.6 A
V
DS
= 5 V, I
D
= 6.3 A
Q2
Q1
50
40
S
Dynamic Characteristics
C
iss
Input Capacitance
Q2
Q1
2085
760
pF
C
oss
Output Capacitance
Q2
Q1
420
160
pF
C
rss
Reverse Transfer Capacitance
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
Q2
Q1
160
70
pF
FDS6982
FDS6982, Rev. C
Electrical Characteristics
(continued)
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min
Typ
Max Units
Switching Characteristics
(Note 2)
t
d(on)
Turn-On Delay Time
Q2
Q1
15
10
27
18
ns
t
r
Turn-On Rise Time
Q2
Q1
11
14
20
25
ns
t
d(off)
Turn-Off Delay Time
Q2
Q1
36
21
58
34
ns
t
f
Turn-Off Fall Time
V
DD
= 15 V, I
D
= 1 A,
V
GS
= 10V, R
GEN
= 6
Q2
Q1
18
7
29
14
ns
Q
g
Total Gate Charge
Q2
Q1
18.5
8.5
26
12
nC
Q
gs
Gate-Source Charge
Q2
Q1
7.3
2.4
nC
Q
gd
Gate-Drain Charge
Q2
V
DS
= 15 V, I
D
= 8.6 A, V
GS
= 5 V
Q1
V
DS
= 15 V, I
D
= 6.3 A,V
GS
= 5 V
Q2
Q1
6.2
3.1
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
Q2
Q1
1.3
1.3
A
V
SD
Drain-Source Diode Forward
Voltage
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
Q2
Q1
0.72
0.74
1.2
1.2
V
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC
is guaranteed by design while R
JA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width
300
s, Duty Cycle
2.0%
a) 78
C/W when
mounted on a 0.5 in
2
pad of 2 oz. copper.
b) 125
C/W when
mounted on a 0.02 in
2
pad of 2 oz. copper.
c) 135
C/W when
mounted on a 0.003 in
2
pad of 2 oz. copper.
FDS6982
FDS6982, Rev. C
Typical Characteristics: Q2
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage.
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
0
10
20
30
40
50
0
1
2
3
4
V
DS
, DRAIN-SOURCE VOLTAGE (V)
V
GS
= 10V
3.5V
3.0V
4.5V
4.0V
5.0V
0.8
1
1.2
1.4
1.6
1.8
2
0
10
20
30
40
50
I
D
, DRAIN CURRENT (A)
V
GS
= 4.0V
6.0V
5.0V
4.5V
7.0V
10V
0
10
20
30
40
50
1
2
3
4
5
6
V
GS
, GATE TO SOURCE VOLTAGE (V)
T
A
= -55
o
C
25
o
C
125
o
C
V
DS
= 5V
0.0001
0.001
0.01
0.1
1
10
100
0
0.4
0.8
1.2
1.6
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
T
A
= 125
o
C
25
o
C
-55
o
C
V
GS
= 0V
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
I
D
= 8.6A
V
GS
= 10V
0
0.01
0.02
0.03
0.04
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
= 4.5A
T
A
= 125
o
C
T
A
= 25
o
C
FDS6982
FDS6982, Rev. C
Typical Characteristics: Q2
(continued)
Figure 7. Gate-Charge Characteristics.
Figure 8. Capacitance Characteristics.
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0
2
4
6
8
10
0
5
10
15
20
25
30
35
Q
g
, GATE CHARGE (nC)
I
D
= 8.6A
V
DS
= 5V
10V
15V
0
500
1000
1500
2000
2500
3000
0
5
10
15
20
25
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
0.01
0.1
1
10
100
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
DC
10s
1s
100ms
10ms
1ms
100
s
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
JA
= 135
o
C/W
T
A
= 25
o
C
0
5
10
15
20
25
30
0.01
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R
JA
= 135
o
C/W
TA = 25
o
C
FDS6982
FDS6982, Rev. C
Typical Characteristics: Q1
Figure 11. On-Region Characteristics.
Figure 12. On-Resistance Variation
with Drain Current and Gate Voltage.
Figure 13. On-Resistance Variation
with Temperature.
Figure 14. On-Resistance Variation
with Gate-to-Source Voltage.
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
0
10
20
30
40
0
1
2
3
4
V
DS
, DRAIN-SOURCE VOLTAGE (V)
V
GS
= 10V
3.5V
3.0V
4.5V
4.0V
6.0V
2.5V
0.8
1
1.2
1.4
1.6
1.8
2
0
10
20
30
40
I
D
, DRAIN CURRENT (A)
V
GS
= 3.5V
6.0V
5.0V
4.5V
4.0V
10V
0
10
20
30
40
1
2
3
4
5
6
V
GS
, GATE TO SOURCE VOLTAGE (V)
T
A
= -55
o
C
25
o
C
125
o
C
V
DS
= 5V
0.0001
0.001
0.01
0.1
1
10
100
0
0.4
0.8
1.2
1.6
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
T
A
= 125
o
C
25
o
C
-55
o
C
V
GS
= 0V
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
I
D
= 6.3A
V
GS
= 10V
0
0.02
0.04
0.06
0.08
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
= 3.5A
T
A
= 125
o
C
T
A
= 25
o
C
FDS6982
FDS6982, Rev. C
Typical Characteristics: Q1
(continued)
Figure 17. Gate-Charge Characteristics.
Figure 18. Capacitance Characteristics.
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum
Power Dissipation.
0
2
4
6
8
10
0
4
8
12
16
Q
g
, GATE CHARGE (nC)
I
D
= 6.3A
V
DS
= 5V
10V
15V
0
200
400
600
800
1000
1200
0
5
10
15
20
25
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
ISS
C
RSS
C
OSS
f = 1MHz
V
GS
= 0 V
0
5
10
15
20
25
30
0.01
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
SINGLE PULSE
R
JA
= 135
o
C/W
TA = 25
o
C
0.01
0.1
1
10
100
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
DC
10s
1s
100ms
10ms
1ms
100
s
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
JA
= 135
o
C/W
T
A
= 25
o
C
FDS6982
FDS6982, Rev. C
Typical Characteristics: Q1 & Q2
(continued)
Figure 21. Transient Thermal Response Curve.
0.0001
0.001
0.01
0.1
1
10
100
300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
T
R
A
N
S
I
E
NT
T
H
E
RM
AL RE
S
I
S
T
AN
CE
r
(
t
)
,
NO
RM
AL
I
Z
E
D
E
F
F
E
CT
I
V
E
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
Duty Cycle, D = t /t
1
2
R (t) = r(t) * R
R = 135C/W
JA
JA
JA
T - T = P * R (t)
JA
A
J
P(pk)
t
1
t
2
F
852
831N
F
852
831N
F
852
831N
F
852
831N
SOIC-8 Unit Orientation
Conductive Embossed
Carrier Tape
F63TNR
Label
ESD Label
Antistatic Cover Tape
SOIC(8lds) Packaging
Configuration: Figure 1.0
Components
Leader Tape
390mm minimum
Trailer Tape
160mm minimum
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Cover Tape
Carrier
Pin 1
Tape
Note/Comments
Bulk
Packaging Option
SOIC (8lds) Packaging Information
Standard
(no flow code)
L86Z
S62Z
Packaging type
Reel Size
TNR
13" Dia
Rail/Tube
-
Bag
-
Qty per Reel/Tube/Bag
2,500
95
200
Box Dimension (mm)
343x64x343
530x130x83
76x102x127
Max qty per Box
5,000
30,000
1,000
D84Z
TNR
7" Dia
500
184x187x47
2,500
Weight per unit (gm)
0.0774
0.0774
0.0774
0.0774
Weight per Reel (kg)
0.6060
-
-
0.1182
N
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC
ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS
TNR DATE
PT NUMBER
PEEL STRENGTH MIN ______________ gms
MAX _____________ gms
LOT: CBVK741B019
FSID: FDS9953A
D/C1: D9842
QTY1:
SPEC REV: QARV:
SPEC:
QTY: 2500
D/C2:
QTY2:
CPN:
(F63TNR)2
F63TNLabel
ESD Label
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
F63TNLabel
Customized
Label
SO-8 Tape and Reel Data and Package Dimensions
November 1998, Rev. A
1998 Fairchild Semiconductor Corporation
Dimensions are in millimeter
Pkg type
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
SOIC(8lds)
(12mm)
6.50
+/-0.10
5.30
+/-0.10
12.0
+/-0.3
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
5.50
+/-0.05
8.0
+/-0.1
4.0
+/-0.1
2.1
+/-0.10
0.450
+/-
0.150
9.2
+/-0.3
0.06
+/-0.02
P1
A0
D1
P0
F
W
E1
D0
E2
B0
Tc
Wc
K0
T
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
12mm
7" Dia
7.00
177.8
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
5.906
150
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 0.606
11.9 15.4
12mm
13" Dia
13.00
330
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 0.606
11.9 15.4
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg maximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side or Front Sectional View)
Component Rotation
User Direction of Feed
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
SOIC(8lds) Reel Configuration: Figure 4.0
SO-8 Tape and Reel Data and Package Dimensions, continued
November 1998, Rev. A
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
SO-8 Tape and Reel Data and Package Dimensions, continued
September 1998, Rev. A
9
TRADEMARKS
ACExTM
CoolFETTM
CROSSVOLTTM
E
2
CMOS
TM
FACTTM
FACT Quiet SeriesTM
FAST
FASTrTM
GTOTM
HiSeCTM
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
ISOPLANARTM
MICROWIRETM
POPTM
PowerTrenchTM
QSTM
Quiet SeriesTM
SuperSOTTM-3
SuperSOTTM-6
SuperSOTTM-8
TinyLogicTM
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
UHCTM
VCXTM
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