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Электронный компонент: FDS6990A

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2003 Fairchild Semiconductor Corporation
DS500773
www.fairchildsemi.com
January 2003
Revised January 2003
1
00EL
T
22
5V Dual TTL to Dif
f
er
enti
al

PECL T
r
ansl
ator
100ELT22
5V Dual TTL to Differential PECL Translator
General Description
The 100ELT22 is a TTL to differential PECL translator
operating from a single
+
5V supply.
Both outputs of a differential pair should be terminated in
50
to V
CC
- 2.0V even if only one output is being used. If
an output pair is unused both outputs can be left open
(un-terminated).
The 100 series is temperature compensated.
Features
s
Typical propagation delay of 300 ps
s
<
100 ps between outputs
s
Max I
CC
of 30 mA
s
Fairchild MSOP-8 package is a drop-in replacement to
ON TSSOP-8
s
Flow through pinout
s
Meets or exceeds JEDEC specification EIA/JESD78 IC
latch-up test
s
Moisture Sensitivity Level 1
s
ESD Performance:
Human Body Model
>
2000V
Machine Model
>
200V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Top View
Pin Descriptions
Logic Diagram
Order Number
Product
Package Description
Package
Code
Number
Top Mark
100ELT22M
M08A
KLT22
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
100ELT22M8
(Preliminary)
MA08D
KT22
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Pin Name
Description
Q
n
, Q
n
PECL Differential Outputs
D
0
, D
1
TTL Inputs
V
CC
Positive Supply
GND
Ground
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2
100
E
L
T22
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
PECL DC Electrical Characteristics
V
CC
=
5.0V; GND
=
0.0V (Note 2)
Note 2: Output parameters vary 1 to 1 with V
CC
. V
CC
can vary
+
0.5V/
-
0.8V.
Note 3: Outputs are terminated through a 50
Resistor to V
CC
-
2.0V.
Note: Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than
500LFPM maintained.
TTL DC Electrical Characteristics
V
CC
=
5.0V; GND
=
0.0V (Note 4); T
A
=
-
40
C to
+
85
C
Note 4: V
CC
can vary
+
0.5V/
-
0.8V.
AC Electrical Characteristics
V
CC
=
5.0V; GND
=
0.0V (Note 5)
Note 5: V
CC
can vary
+
0.5V/
-
0.8V.
Note 6: Specifications for standard TTL input signal (see Figure 1).
Note 7: Within-device skew is defined as identical transitions on similar paths through a device.
Supply Voltage (V
CC
)
0.0V to
+
7.0V
Input Voltage (V
I
) V
I
V
CC
0.0V to
+
7.0V
DC Output Current (I
OUT
)
Continuous
50 mA
Surge
100 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Power Supply Operating
V
CC
=
4.2V to 5.5V
TTL Input Voltage
0.0V to V
CC
Free Air Operating Temperature (T
A
)
-
40
C to
+
85
C
Symbol
Parameter
-
40
C
25
C
85
C
Units
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
I
CC
Power Supply Current
30
30
30
mA
V
OH
Output HIGH Voltage (Note 3)
3915
3995
4120
3975
4045
4120
3975
4050
4120
mV
V
OL
Output LOW Voltage (Note 3)
3170
3305
3445
3190
3295
3380
3190
3295
3380
mV
Symbol
Parameter
Min
Typ
Max
Units
Condition
I
IH
Input HIGH Current
20
A
V
IN
=
2.7V
100
V
IN
=
V
CC
I
IL
Input LOW Current
-
200
A
V
IN
=
0.5V
V
IK
Clamp Diode Voltage
-
1.2
V
I
IN
=
-
18 mA
V
IH
Input HIGH Voltage
2.0
V
V
IL
Input LOW Voltage
0.8
V
Symbol
Parameter
-
40
C
25
C
85
C
Units
Figure
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Number
f
MAX
Maximum Input Frequency
TBD
TBD
TBD
MHz
t
JITTER
Cycle-to-Cycle Jitter
TBD
TBD
TBD
ps
t
PLH
, t
PHL
Propagation Delay to Output (Note 6)
100
600
100
600
100
600
ps
Figure 1
t
r
, t
f
Output Rise Time/Fall Times
200
500
200
500
200
500
ns
Figure 2
(20% to 80%)
t
skpp
Part to Part Skew
500
500
500
ps
t
skew
Within Device Skew (Note 7)
100
100
100
ps
3
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1
00EL
T
22
Switching Waveforms
Note: V
M
varies 1:1 with V
EE
FIGURE 1. TTL to Differential PECL Propagation Delay
FIGURE 2. Differential Output Edge Rates
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4
100
E
L
T22
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M08A
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
5
www.fairchildsemi.com
1
00EL
T
22
5V Dual TTL to Dif
f
er
enti
al

PECL T
r
ansl
ator
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Package Number MA08D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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