February 2004
2004 Fairchild Semiconductor Corporation
FDS7082N3 Rev D1 (W)
FDS7082N3
30V N-Channel PowerTrench
MOSFET
General Description
This N-Channel MOSFET in the thermally enhanced
SO8 FLMP package has been designed specifically to
improve the overall efficiency of DC/DC converters.
Providing a balance of low R
DS(ON)
and Qg it is ideal for
synchronous rectifier applications in both isolated and
non-isolated topologies. It is also well suited for both
high and low side switch applications in Point of Load
converters.
Applications
Secondary side Synchronous rectifier
Synchronous Buck VRM and POL Converters
Features
17.5 A, 30 V R
DS(ON)
= 6 m
@ V
GS
= 10 V
R
DS(ON)
= 8 m
@ V
GS
= 4.5 V
High performance trench technology for extremely
low R
DS(ON)
Low Qg and Rg for fast switching
FLMP SO-8 package for enhanced thermal
performance in an industry-standard package outline.
4
5
3
6
2
7
1
8
Bottom-side
Drain Contact
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol Parameter
Ratings
Units
V
DSS
Drain-Source Voltage
30
V
V
GSS
Gate-Source
Voltage
20
V
I
D
Drain Current Continuous
(Note 1a)
17.5 A
Pulsed
60
P
D
Power Dissipation for Single Operation
(Note 1a)
3.0
(Note 1b)
1.5
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
40
C/W
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
0.5
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS7082N3
FDS7082N3
13''
12mm
2500 units
FDS7082N3
FDS7082N3 Rev D1 (W)
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol Parameter
Test
Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
DrainSource Breakdown Voltage V
GS
= 0 V, I
D
= 250
A
30 V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25C
24 mV/
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
10
A
I
GSS
GateBody
Leakage
V
GS
=
20 V, V
DS
= 0 V
100
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250
A
1 2 3 V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25C
4.3 mV/
C
R
DS(on)
Static DrainSource
OnResistance
V
GS
= 10 V, I
D
= 17.5 A
V
GS
= 4.5 V, I
D
= 15.5 A
V
GS
= 10 V, I
D
= 17.5 A,T
J
= 125
C
4.9
6.5
5.0
6.0
8.0
8.0
m
g
FS
Forward
Transconductance V
DS
= 10 V, I
D
= 17.5 A
116
S
Dynamic Characteristics
C
iss
Input
Capacitance
2271
pF
C
oss
Output
Capacitance
554
pF
C
rss
Reverse Transfer Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
213 pF
R
G
Gate
Resistance
V
GS
= 15 mV, f = 1.0 MHz
1.4
Switching Characteristics
(Note 2)
t
d(on)
TurnOn
Delay
Time
14
20
ns
t
r
TurnOn Rise Time
12
37
ns
t
d(off)
TurnOff Delay Time
38
64
ns
t
f
TurnOff
Fall
Time
V
DD
= 15 V, I
D
= 1 A,
V
GS
= 10 V, R
GEN
= 6
18 32 ns
Q
g
Total Gate Charge
V
DS
= 15 V, I
D
= 17.5 A, V
GS
=10 V
43 53 nC
Q
g
Total Gate Charge
22
31
nC
Q
gs
GateSource
Charge
6.8
nC
Q
gd
GateDrain
Charge
V
DS
= 15 V, I
D
= 17.5 A, V
GS
= 5 V
6.9 nC
DrainSource Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous DrainSource Diode Forward Current
2.5
A
V
SD
DrainSource Diode Forward
Voltage
V
GS
= 0 V, I
S
= 2.5 A
(Note 2)
0.7
1.2 V
t
rr
Diode Reverse Recovery Time
31
nS
Q
rr
Diode Reverse Recovery Charge
I
F
= 17.5 A,
d
iF
/d
t
= 100 A/s
21 nC
FDS7082N3
FDS7082N3 Rev D1 (W)
Electrical Characteristics
Notes:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC
is guaranteed by design while R
CA
is determined by the user's board design.
a) 40C/W
when
mounted on a 1in
2
pad
of 2 oz copper
b)
85C/W when mounted on
a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
FDS7082N3
FDS7082N3 Rev D1 (W)
Typical Characteristics
0
20
40
60
0
0.5
1
1.5
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
4.5V
3.0V
V
GS
= 10V
3.5V
4.0V
6.0V
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
3
0
10
20
30
40
50
60
I
D
, DRAIN CURRENT (A)
R
DS
(O
N)
, NORMAL
IZ
ED
DRAIN-SOURCE ON-RESIST
ANCE
V
GS
= 3.5V
4.0V
4.5V
10V
6.0V
5.0V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS
(O
N)
, NORMAL
IZ
ED
DRAIN-SOURCE ON-RESIST
ANCE
I
D
= 17.5A
V
GS
= 10V
0.002
0.006
0.01
0.014
0.018
0.022
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS
(O
N)
, ON-
R
E
S
I
S
T
ANCE
(
O
HM)
I
D
= 8.75A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
10
20
30
40
50
60
2
2.5
3
3.5
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRE
NT
(
A
)
T
A
=125
o
C
25
o
C
-55
o
C
V
DS
= 5V
0.0001
0.001
0.01
0.1
1
10
100
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
I
S
, REVERSE DRAIN CURRENT
(A)
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS7082N3
FDS7082N3 Rev D1 (W)
Typical Characteristics
0
2
4
6
8
10
0
10
20
30
40
50
Q
g
, GATE CHARGE (nC)
V
GS
, GAT
E
-SOURCE VOL
T
A
GE (V)
I
D
= 17.5A
V
DS
= 5V
15V
10V
0
500
1000
1500
2000
2500
3000
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACIT
ANCE (p
F
)
C
iss
C
rss
C
oss
f = 1MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
I
D
,
DRAI
N CURR
E
N
T
(
A
)
DC
1s
100ms
R
DS(ON)
LIMIT
V
GS
= 10V
SINGLE PULSE
R
JA
= 85
o
C/W
T
A
= 25
o
C
10ms
1ms
100s
10s
0
10
20
30
40
50
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
P(
pk)
,
PEAK TRANSIENT POWER (
W
)
SINGLE PULSE
R
JA
= 85C/W
T
A
= 25C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.00
0.01
0.10
1.00
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r
(
t
)
,
NO
RMAL
I
Z
E
D
E
F
F
E
CT
I
V
E
T
RANS
I
E
N
T
T
H
E
R
MAL
RE
S
I
S
T
ANCE
R
JA
(t) = r(t) * R
JA
R
JA
= 85 C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDS7082N3
FDS7082N3 Rev D1 (W)
Dimensional Outline and Pad Layout
FDS7082N3
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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