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Электронный компонент: FDY2000PZ

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January 2006
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FDY2000PZ Rev A
FDY2000PZ
Dual P-Channel ( 2.5V) Specified PowerTrench
MOSFET
General Description
This Dual P-Channel MOSFET has been designed
using Fairchild Semiconductor's advanced Power
Trench process to optimize the R
DS(ON)
@ V
GS
= 2.5v.
Applications
Li-Ion Battery Pack
Features
350 mA, 20 V R
DS(ON)
= 1.2
@ V
GS
= 4.5 V
R
DS(ON)
= 1.6
@ V
GS
= 2.5 V
ESD protection diode (note 3)
RoHS Compliant
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Unit
s
V
DSS
Drain-Source Voltage
20
V
V
GSS
Gate-Source Voltage
8
V
Drain Current Continuous
(Note 1a) 1a)
350
I
D
Pulsed
1000
mA
Power Dissipation (Steady State)
(Note 1a) 1a)
625
P
D
(Note 1b) 1
446
mW
T
J
, T
STG
Operating and Storage Junction Temperature
Range
55 to +150
C
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a) 1a)
200
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1b) 1
280
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
A
FDY2000PZ
7 ''
8 mm
3000 units
F
D
Y
2
0
0
0
P
Z

D
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M
O
S
F
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1
3
5
2
4
6
S
1
D
1
G
2
S
2
D
2
G
1
4
6
5
3
1
2
background image
FDY200PZ Rev A www.fairchildsemi.com
Electrical Characteristics
T
A
= 25C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV
DSS
DrainSource Breakdown
Voltage
V
GS
= 0 V,
I
D
= 250
A
20
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250
A, Referenced to 25
C
14
mV/
C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 16 V, V
GS
= 0 V
3
A
I
GSS
GateBody Leakage,
V
GS
=
8 V,
V
DS
= 0 V
10
A
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
,
I
D
= 250
A
0.65 1.03 1.5
V
V
GS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250
A, Referenced to 25
C
3
mV/
C
R
DS(on)
Static DrainSource
OnResistance
V
GS
= 4.5 V, I
D
= 350 mA
V
GS
= 2.5 V, I
D
= 300 mA
V
GS
= 1.8 V, I
D
= 150 mA
V
GS
= 4.5 V, I
D
= 350 mA,
T
J
= 125
C
0.5
0.8
1.3
0.7
1.2
1.6
2.7
1.6
g
FS
Forward Transconductance
V
DS
= 5 V, I
D
= 350 mA
1.04
S
Dynamic Characteristics
C
iss
Input Capacitance
100
pF
C
oss
Output Capacitance
30
pF
C
rss
Reverse Transfer Capacitance
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
15
pF
Switching Characteristics
(Note 2)
t
d(on)
TurnOn Delay Time
6
12
ns
t
r
TurnOn Rise Time
13
23
ns
t
d(off)
TurnOff Delay Time
8
16
ns
t
f
TurnOff Fall Time
V
DD
= 10 V, I
D
= 0.5 A,
V
GS
= 4.5 V, R
GEN
= 6
1
2
ns
Q
g
Total Gate Charge
1.0
1.4
nC
Q
gs
GateSource Charge
0.2
nC
Q
gd
GateDrain Charge
V
DS
= 10 V, I
D
= 350 mA,
V
GS
= 4.5 V
0.3
nC
DrainSource Diode Characteristics and Maximum Ratings
V
SD
DrainSource Diode Forward
Voltage
V
GS
= 0 V, I
S
= 150 m A
(Note 2)
0.8 1.2
V
t
rr
Diode Reverse Recovery Time
10
ns
Q
rr
Diode Reverse Recovery Charge
I
F
= 350 mA,
dI
F
/dt = 100 A/s
1.5
nC
Notes:
1
. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC
is guaranteed by design while R
CA
is determined by the user's board design
a)
200C/W when
mounted on a 1in
2
pad
of 2 oz copper
b) 280C/W when mounted on a
minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper
2
.
Pulse Test: Pulse Width < 300
s,
Duty Cycle < 2.0%
3. The diode connected between the gate
and source serves only as protection
againts ESD. No gate overvoltage
rating is implied.
F
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0
0
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Z

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background image
FDY200PZ Rev A www.fairchildsemi.com
Typical Characteristics
0
0.2
0.4
0.6
0.8
1
0
0.5
1
1.5
2
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
V
GS
= -4.5V
-3.0V
-1.8V
-2.0V
-2.5V
V
-4.0V
0.6
1
1.4
1.8
2.2
2.6
0
0.2
0.4
0.6
0.8
1
-I
D
, DRAIN CURRENT (A)
R
D
S
(
O
N
)
,

N
O
R
M
A
L
I
Z
E
D
D
R
A
I
N
-
S
O
U
R
C
E

O
N
-
R
E
S
I
S
T
A
N
C
E
V
GS
=-1.8V
-3.0V
-3.5V
-4.5V
-2.0V
-2.5V
-4.0V
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
D
S
(
O
N
)
,

N
O
R
M
A
L
I
Z
E
D

D
R
A
I
N
-
S
O
U
R
C
E

O
N
-
R
E
S
I
S
T
A
N
C
E
I
D
= -0.35A
V
GS
= -4.5V
0.25
0.75
1.25
1.75
2.25
0
2
4
6
8
10
-V
GS
, GATE TO SOURCE VOLTAGE (V)
R
D
S
(
O
N
)
,

O
N
-
R
E
S
I
S
T
A
N
C
E

(
O
H
M
)
I
D
= -0.175A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
0.2
0.4
0.6
0.8
1
0.5
1
1.5
2
2.5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
T
A
= 125
o
C
25
o
C
-55
o
C
V
DS
= -5V
0.0001
0.001
0.01
0.1
1
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
-
I
S
,

R
E
V
E
R
S
E

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
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background image
FDY200PZ Rev A www.fairchildsemi.com
Typical Characteristics
0
2
4
6
8
10
0
0.5
1
1.5
2
2.5
Q
g
, GATE CHARGE (nC)
-
V
G
S
,

G
A
T
E
-
S
O
U
R
C
E

V
O
L
T
A
G
E

(
V
)
I
D
= -0.35A
V
DS
= -5V
-15V
-10V
0
25
50
75
100
125
150
0
4
8
12
16
20
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C
A
P
A
C
I
T
A
N
C
E

(
p
F
)
C
iss
C
oss
C
rss
f = 1 MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
0.01
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-
I
D
,

D
R
A
I
N

C
U
R
R
E
N
T

(
A
)
DC
1s
100ms
100
s
R
DS(ON)
LIMIT
V
GS
= -4.5V
SINGLE PULSE
R
JA
= 280
o
C/W
T
A
= 25
o
C
10ms
1ms
10s
0
2
4
6
8
10
0.0001
0.001
0.01
0.1
1
10
100
t
1
, TIME (sec)
P
(
p
k
)
,

P
E
A
K

T
R
A
N
S
I
E
N
T

P
O
W
E
R

(
W
)
SINGLE PULSE
R
JA
= 280C/W
T
A
= 25C
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
r
(
t
)
,

N
O
R
M
A
L
I
Z
E
D

E
F
F
E
C
T
I
V
E

T
R
A
N
S
I
E
N
T
T
H
E
R
M
A
L

R
E
S
I
S
T
A
N
C
E
R
JA
(t) = r(t) * R
JA
R
JA
=280 C/W
T
J
- T
A
= P * R
JA
(t)
Duty Cycle, D = t
1
/ t
2
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
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background image
FDY200PZ Rev A www.fairchildsemi.com
Dimensional Outline and Pad Layout
0.55
1.20 BSC
0.20 BSC
0.35 BSC
0.18
0.10
DETAIL A
SCALE 2 : 1
0.10
0.00
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO EIAJ
SC89 PACKAGING STANDARD.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
1.70
1.50
1.70
1.55
0.50
1.00
0.30
0.15
0.60
0.56
(0.20)
1
3
6
4
SEE DETAIL A
LAND PATTERN RECOMMENDATION
1.80
0.30
1.25
0.50
0.50
F
D
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